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| author | Neil Armstrong <neil.armstrong@linaro.org> | 2023-11-21 10:51:11 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-12-07 08:42:08 -0800 |
| commit | 17fc6f391932dfc8c11634667ca2d1d24c961cf5 (patch) | |
| tree | 05677194e4b4cbadc3d33aa6b9965347346a22ae /arch | |
| parent | 3515c3172f66ad4b3f485862f858f76a3e49c659 (diff) | |
| download | linux-stable-17fc6f391932dfc8c11634667ca2d1d24c961cf5.tar.gz linux-stable-17fc6f391932dfc8c11634667ca2d1d24c961cf5.tar.bz2 linux-stable-17fc6f391932dfc8c11634667ca2d1d24c961cf5.zip | |
arm64: deconfig: enable Qualcomm SM8650 SoC drivers
Enable Clocks, Pinctrl and Interconnect drivers in the ARM64
defconfig for the Qualcomm SM8650 SoC to boot the SM8650 MTP
(Mobile Test Platform) and QRD (Qualcomm Reference Device) boards.
TCSRCC, GCC, Interconnect, and Pinctrl config are marked as builtin and
not modules due to boot dependencies.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231121-topic-sm8650-upstream-defconfig-v1-1-2500565fc21b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/configs/defconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 4c0cd428d073..d3be3af4a3d8 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -614,6 +614,7 @@ CONFIG_PINCTRL_SM8450=y CONFIG_PINCTRL_SM8450_LPASS_LPI=m CONFIG_PINCTRL_SC8280XP_LPASS_LPI=m CONFIG_PINCTRL_SM8550=y +CONFIG_PINCTRL_SM8650=y CONFIG_PINCTRL_SM8550_LPASS_LPI=m CONFIG_PINCTRL_LPASS_LPI=m CONFIG_GPIO_AGGREGATOR=m @@ -1259,14 +1260,18 @@ CONFIG_SM_DISPCC_6115=m CONFIG_SM_DISPCC_8250=y CONFIG_SM_DISPCC_8450=m CONFIG_SM_DISPCC_8550=m +CONFIG_SM_DISPCC_8650=m CONFIG_SM_GCC_6115=y CONFIG_SM_GCC_8350=y CONFIG_SM_GCC_8450=y CONFIG_SM_GCC_8550=y +CONFIG_SM_GCC_8650=y CONFIG_SM_TCSRCC_8550=y +CONFIG_SM_TCSRCC_8650=y CONFIG_SM_GPUCC_6115=m CONFIG_SM_GPUCC_8150=y CONFIG_SM_GPUCC_8250=y +CONFIG_SM_GPUCC_8650=m CONFIG_SM_VIDEOCC_8250=y CONFIG_QCOM_HFPLL=y CONFIG_CLK_GFM_LPASS_SM8250=m @@ -1527,6 +1532,7 @@ CONFIG_INTERCONNECT_QCOM_SM8250=m CONFIG_INTERCONNECT_QCOM_SM8350=m CONFIG_INTERCONNECT_QCOM_SM8450=y CONFIG_INTERCONNECT_QCOM_SM8550=y +CONFIG_INTERCONNECT_QCOM_SM8650=y CONFIG_COUNTER=m CONFIG_RZ_MTU3_CNT=m CONFIG_HTE=y |