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authorJavi Merino <javi.merino@arm.com>2013-01-31 20:09:04 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2013-03-20 17:22:12 +0000
commit3e98fdacc59bbbdbb659be1a144ccc48ed4860fa (patch)
tree2883828516c7f88b2f63138dfc28c93cb5b26b35 /arch
parentde79a64d61ed3f7ccec9f9661fab2f3e97256243 (diff)
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arm64: kernel: make the pen of the secondary a 64-bit unsigned value
Change the prototype of write_pen_release() accordingly and clarify that's holding the hardware id of the secondary that's going to boot. This is in preparation of getting HWIDs parsed from the DT. Signed-off-by: Javi Merino <javi.merino@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/include/asm/cputype.h2
-rw-r--r--arch/arm64/kernel/smp.c10
2 files changed, 7 insertions, 5 deletions
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 7a317029e735..9397a17bec0b 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -26,6 +26,8 @@
#define ID_AA64ISAR0_EL1 "id_aa64isar0_el1"
#define ID_AA64MMFR0_EL1 "id_aa64mmfr0_el1"
+#define INVALID_HWID ULONG_MAX
+
#define read_cpuid(reg) ({ \
u64 __val; \
asm("mrs %0, " reg : "=r" (__val)); \
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index bdd34597254b..a57a373d305f 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -53,7 +53,7 @@
* where to place its SVC stack
*/
struct secondary_data secondary_data;
-volatile unsigned long secondary_holding_pen_release = -1;
+volatile unsigned long secondary_holding_pen_release = INVALID_HWID;
enum ipi_msg_type {
IPI_RESCHEDULE,
@@ -70,7 +70,7 @@ static DEFINE_RAW_SPINLOCK(boot_lock);
* in coherency or not. This is necessary for the hotplug code to work
* reliably.
*/
-static void __cpuinit write_pen_release(int val)
+static void __cpuinit write_pen_release(u64 val)
{
void *start = (void *)&secondary_holding_pen_release;
unsigned long size = sizeof(secondary_holding_pen_release);
@@ -105,7 +105,7 @@ static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) {
- if (secondary_holding_pen_release == -1UL)
+ if (secondary_holding_pen_release == INVALID_HWID)
break;
udelay(10);
}
@@ -116,7 +116,7 @@ static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
*/
raw_spin_unlock(&boot_lock);
- return secondary_holding_pen_release != -1 ? -ENOSYS : 0;
+ return secondary_holding_pen_release != INVALID_HWID ? -ENOSYS : 0;
}
static DECLARE_COMPLETION(cpu_running);
@@ -190,7 +190,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
* Let the primary processor know we're out of the
* pen, then head off into the C entry point
*/
- write_pen_release(-1);
+ write_pen_release(INVALID_HWID);
/*
* Synchronise with the boot thread.