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| author | Andi Kleen <ak@linux.intel.com> | 2015-05-10 12:22:46 -0700 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2015-08-04 10:16:58 +0200 |
| commit | 425507fa5f321bb5ce1b5eb57a9586e0cf0b9802 (patch) | |
| tree | e1f9614f91b95c082ce0ab0d2310103811954d96 /arch | |
| parent | 0f29e573dd32bb8598e74271454e97c962da5e05 (diff) | |
| download | linux-stable-425507fa5f321bb5ce1b5eb57a9586e0cf0b9802.tar.gz linux-stable-425507fa5f321bb5ce1b5eb57a9586e0cf0b9802.tar.bz2 linux-stable-425507fa5f321bb5ce1b5eb57a9586e0cf0b9802.zip | |
perf/x86/intel/lbr: Optimize v4 LBR unfreezing
In Arch perfmon v4 the GLOBAL_STATUS reset automatically unfreezes
LBRs. So no need to do it manually in the LBR code. Add a check
to skip it.
v2: Move test up to beginning of function.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1431285767-27027-9-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_lbr.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c index 2fb57373beca..769a42f874dc 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c @@ -141,6 +141,13 @@ static void __intel_pmu_lbr_enable(bool pmi) u64 debugctl, lbr_select = 0, orig_debugctl; /* + * No need to unfreeze manually, as v4 can do that as part + * of the GLOBAL_STATUS ack. + */ + if (pmi && x86_pmu.version >= 4) + return; + + /* * No need to reprogram LBR_SELECT in a PMI, as it * did not change. */ |