diff options
| author | Conor Dooley <conor.dooley@microchip.com> | 2022-07-05 22:52:06 +0100 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-07-14 14:57:41 -0700 |
| commit | 465c12749b363e0259a3f50d84ec34261d9ba00e (patch) | |
| tree | 88c5e20b8116628aadd5042df1036e755332d468 /arch | |
| parent | 727b05e46cffd74adca96ca13e57352339875586 (diff) | |
| download | linux-stable-465c12749b363e0259a3f50d84ec34261d9ba00e.tar.gz linux-stable-465c12749b363e0259a3f50d84ec34261d9ba00e.tar.bz2 linux-stable-465c12749b363e0259a3f50d84ec34261d9ba00e.zip | |
riscv: dts: canaan: fix the k210's memory node
The k210 U-Boot port has been using the clocks defined in the
devicetree to bring up the board's SRAM, but this violates the
dt-schema. As such, move the clocks to a dedicated node with
the same compatible string. The regs property does not fit in
either node, so is replaced by comments.
Tested-by: Niklas Cassel <niklas.cassel@wdc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220705215213.1802496-6-mail@conchuod.ie
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/riscv/boot/dts/canaan/k210.dtsi | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/riscv/boot/dts/canaan/k210.dtsi b/arch/riscv/boot/dts/canaan/k210.dtsi index 44d338514761..cd4eae82d8b2 100644 --- a/arch/riscv/boot/dts/canaan/k210.dtsi +++ b/arch/riscv/boot/dts/canaan/k210.dtsi @@ -69,11 +69,13 @@ sram: memory@80000000 { device_type = "memory"; + reg = <0x80000000 0x400000>, /* sram0 4 MiB */ + <0x80400000 0x200000>, /* sram1 2 MiB */ + <0x80600000 0x200000>; /* aisram 2 MiB */ + }; + + sram_controller: memory-controller { compatible = "canaan,k210-sram"; - reg = <0x80000000 0x400000>, - <0x80400000 0x200000>, - <0x80600000 0x200000>; - reg-names = "sram0", "sram1", "aisram"; clocks = <&sysclk K210_CLK_SRAM0>, <&sysclk K210_CLK_SRAM1>, <&sysclk K210_CLK_AI>; |