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| author | Clément Léger <cleger@rivosinc.com> | 2023-10-24 15:26:53 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-11-06 09:42:48 -0800 |
| commit | 4cc0d8a3f109fbdd8100ed88fc9417203a5d5b4e (patch) | |
| tree | 856b1c00a5d437ff0bfd80c2335a23a15a8b0949 /arch | |
| parent | 76329c693924d8f37afbf361f0d8daab594e1644 (diff) | |
| download | linux-stable-4cc0d8a3f109fbdd8100ed88fc9417203a5d5b4e.tar.gz linux-stable-4cc0d8a3f109fbdd8100ed88fc9417203a5d5b4e.tar.bz2 linux-stable-4cc0d8a3f109fbdd8100ed88fc9417203a5d5b4e.zip | |
riscv: kernel: Use correct SYM_DATA_*() macro for data
Some data were incorrectly annotated with SYM_FUNC_*() instead of
SYM_DATA_*() ones. Use the correct ones.
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20231024132655.730417-4-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/riscv/kernel/entry.S | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index e48478eb6f2d..54ca4564a926 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -322,7 +322,7 @@ SYM_FUNC_END(__switch_to) .section ".rodata" .align LGREG /* Exception vector table */ -SYM_CODE_START(excp_vect_table) +SYM_DATA_START_LOCAL(excp_vect_table) RISCV_PTR do_trap_insn_misaligned ALT_INSN_FAULT(RISCV_PTR do_trap_insn_fault) RISCV_PTR do_trap_insn_illegal @@ -340,12 +340,11 @@ SYM_CODE_START(excp_vect_table) RISCV_PTR do_page_fault /* load page fault */ RISCV_PTR do_trap_unknown RISCV_PTR do_page_fault /* store page fault */ -excp_vect_table_end: -SYM_CODE_END(excp_vect_table) +SYM_DATA_END_LABEL(excp_vect_table, SYM_L_LOCAL, excp_vect_table_end) #ifndef CONFIG_MMU -SYM_CODE_START(__user_rt_sigreturn) +SYM_DATA_START(__user_rt_sigreturn) li a7, __NR_rt_sigreturn ecall -SYM_CODE_END(__user_rt_sigreturn) +SYM_DATA_END(__user_rt_sigreturn) #endif |