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authorJisheng Zhang <jszhang@marvell.com>2014-12-31 16:57:50 +0800
committerLuis Henriques <luis.henriques@canonical.com>2015-01-22 16:33:17 +0000
commit73a3c145f25517856b87b58e77a2d2d3d861811c (patch)
tree49cd7f466e6129abbd0d3f0117ba966faaab8c8c /arch
parent865f6bdd39ee832edead433abb3e8d6d4593b900 (diff)
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ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host
commit 96ed6046d3bf1113de3bdbd6dbb7f40e6d0ae0ef upstream. On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk. The shdci2 can't work without this patch due to the "core" clk is gated. Fixes: 0d859a6a9d14 ("ARM: dts: berlin: add the SDHCI nodes for the BG2Q") Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/berlin2q.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 635a16a64cb4..39b181dc6fab 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -82,7 +82,8 @@
compatible = "mrvl,pxav3-mmc";
reg = <0xab1000 0x200>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&chip CLKID_SDIO1XIN>;
+ clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
+ clock-names = "io", "core";
status = "disabled";
};