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author | Chao Xie <chao.xie@marvell.com> | 2014-10-31 10:13:48 +0800 |
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committer | Michael Turquette <mturquette@linaro.org> | 2014-11-12 16:34:10 -0800 |
commit | ae32a5b321c8484294d129e7980f8fcf35aa42af (patch) | |
tree | 65e22e25fb37606baecdb530d6005d5ab6b19332 /drivers/clk/mmp/Makefile | |
parent | 4661fda10f8bd57fceef8349d10900e165a0a548 (diff) | |
download | linux-stable-ae32a5b321c8484294d129e7980f8fcf35aa42af.tar.gz linux-stable-ae32a5b321c8484294d129e7980f8fcf35aa42af.tar.bz2 linux-stable-ae32a5b321c8484294d129e7980f8fcf35aa42af.zip |
clk: mmp: add reset support
Some clock control regsiter has bit to reset the cotroller.
So before enable the clock, we need deassert the reset pin.
Make use of reset controller framework to export reset interface
for device drivers, then device driver can control the reset action.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/mmp/Makefile')
-rw-r--r-- | drivers/clk/mmp/Makefile | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/mmp/Makefile b/drivers/clk/mmp/Makefile index 32b5b90c9fa9..2573d7c6198e 100644 --- a/drivers/clk/mmp/Makefile +++ b/drivers/clk/mmp/Makefile @@ -4,6 +4,8 @@ obj-y += clk-apbc.o clk-apmu.o clk-frac.o clk-mix.o clk-gate.o clk.o +obj-$(CONFIG_RESET_CONTROLLER) += reset.o + obj-$(CONFIG_CPU_PXA168) += clk-pxa168.o obj-$(CONFIG_CPU_PXA910) += clk-pxa910.o obj-$(CONFIG_CPU_MMP2) += clk-mmp2.o |