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| author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2022-09-22 14:13:58 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-10-17 10:03:59 +0200 |
| commit | a3b4137a4d4023e6662a2e35579516c7a44bc1cb (patch) | |
| tree | 1c8f6795dc6bd16eb19183fba22e5c66f211d228 /drivers/clk/renesas/r8a779f0-cpg-mssr.c | |
| parent | c516ad419568450dea3a89011bb6e5db4f22d653 (diff) | |
| download | linux-stable-a3b4137a4d4023e6662a2e35579516c7a44bc1cb.tar.gz linux-stable-a3b4137a4d4023e6662a2e35579516c7a44bc1cb.tar.bz2 linux-stable-a3b4137a4d4023e6662a2e35579516c7a44bc1cb.zip | |
clk: renesas: r8a779f0: Add Ethernet Switch clocks
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220922051358.3442191-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/r8a779f0-cpg-mssr.c')
| -rw-r--r-- | drivers/clk/renesas/r8a779f0-cpg-mssr.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c index 4baf355e26d8..304435613723 100644 --- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c @@ -161,6 +161,8 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = { DEF_MOD("cmt3", 913, R8A779F0_CLK_R), DEF_MOD("pfc0", 915, R8A779F0_CLK_CL16M), DEF_MOD("tsc", 919, R8A779F0_CLK_CL16M), + DEF_MOD("tsn", 1505, R8A779F0_CLK_S0D2_HSC), + DEF_MOD("rsw", 1506, R8A779F0_CLK_RSW2), DEF_MOD("ufs", 1514, R8A779F0_CLK_S0D4_HSC), }; |