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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-02-09 17:03:00 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-03-06 10:42:14 +0100 |
| commit | 7502a04dae0e614bc14553e31461e50499bc67aa (patch) | |
| tree | 03f2d1ad9b912eb057587e6cfd1d5f3123d6c5fb /drivers/clk/renesas/r8a779g0-cpg-mssr.c | |
| parent | 8dffb520ace48bcb996db049540c78261730213c (diff) | |
| download | linux-stable-7502a04dae0e614bc14553e31461e50499bc67aa.tar.gz linux-stable-7502a04dae0e614bc14553e31461e50499bc67aa.tar.bz2 linux-stable-7502a04dae0e614bc14553e31461e50499bc67aa.zip | |
clk: renesas: r8a779g0: Add thermal clock
Add the module clock used by the Thermal Sensor/Chip Internal Voltage
Monitor/Core Voltage Monitor (THS/CIVM/CVM) on the Renesas R-Car V4H
(R8A779G0) SoC.
Based on a large patch in the BSP by Kazuya Mizuguchi.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/59461effd0d9f7a39e0c91352c87f2b7071b1891.1675958536.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/clk/renesas/r8a779g0-cpg-mssr.c')
| -rw-r--r-- | drivers/clk/renesas/r8a779g0-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index 18a9462dab76..e2e006a7ae4a 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -213,6 +213,7 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { DEF_MOD("pfc1", 916, R8A779G0_CLK_CL16M), DEF_MOD("pfc2", 917, R8A779G0_CLK_CL16M), DEF_MOD("pfc3", 918, R8A779G0_CLK_CL16M), + DEF_MOD("tsc", 919, R8A779G0_CLK_CL16M), DEF_MOD("ssiu", 2926, R8A779G0_CLK_S0D6_PER), DEF_MOD("ssi", 2927, R8A779G0_CLK_S0D6_PER), }; |