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| author | Ulrich Hecht <uli+renesas@fpond.eu> | 2020-06-16 18:26:24 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-06-22 16:53:40 +0200 |
| commit | ed4a11807d2a35ccfc0d00371f20b826f670b5f2 (patch) | |
| tree | acf3dc936cc3597422ddb1ac680adf23c472304b /drivers/clk/renesas/renesas-cpg-mssr.c | |
| parent | d9563c972c167e6e8b40c840d476d30af8e5f667 (diff) | |
| download | linux-stable-ed4a11807d2a35ccfc0d00371f20b826f670b5f2.tar.gz linux-stable-ed4a11807d2a35ccfc0d00371f20b826f670b5f2.tar.bz2 linux-stable-ed4a11807d2a35ccfc0d00371f20b826f670b5f2.zip | |
clk: renesas: cpg-mssr: Mark clocks as critical only if on at boot
This allows us to add the RWDT clock to the list of critical clocks without
keeping it enabled needlessly if not used.
Changing the semantics of crit_mod_clks in this way is safe for the current
user (INTC-AP) because it is never off at boot time.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20200616162626.27944-2-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/renesas-cpg-mssr.c')
| -rw-r--r-- | drivers/clk/renesas/renesas-cpg-mssr.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c index dcb6e2706d37..4648a829db66 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.c +++ b/drivers/clk/renesas/renesas-cpg-mssr.c @@ -416,14 +416,6 @@ static void __init cpg_mssr_register_mod_clk(const struct mssr_mod_clk *mod, init.name = mod->name; init.ops = &cpg_mstp_clock_ops; init.flags = CLK_SET_RATE_PARENT; - for (i = 0; i < info->num_crit_mod_clks; i++) - if (id == info->crit_mod_clks[i]) { - dev_dbg(dev, "MSTP %s setting CLK_IS_CRITICAL\n", - mod->name); - init.flags |= CLK_IS_CRITICAL; - break; - } - parent_name = __clk_get_name(parent); init.parent_names = &parent_name; init.num_parents = 1; @@ -432,6 +424,15 @@ static void __init cpg_mssr_register_mod_clk(const struct mssr_mod_clk *mod, clock->priv = priv; clock->hw.init = &init; + for (i = 0; i < info->num_crit_mod_clks; i++) + if (id == info->crit_mod_clks[i] && + cpg_mstp_clock_is_enabled(&clock->hw)) { + dev_dbg(dev, "MSTP %s setting CLK_IS_CRITICAL\n", + mod->name); + init.flags |= CLK_IS_CRITICAL; + break; + } + clk = clk_register(NULL, &clock->hw); if (IS_ERR(clk)) goto fail; |