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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-11-29 17:54:58 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-12-26 11:00:05 +0100 |
| commit | 121d5713afeaf388bf996e20233142bd289b5f68 (patch) | |
| tree | ad0089b2cc229de5d405e972f77b5aee3b71b9ad /drivers/clk/renesas | |
| parent | cf919770d05a9b7d10b1609d0b66bc5db8e78a3e (diff) | |
| download | linux-stable-121d5713afeaf388bf996e20233142bd289b5f68.tar.gz linux-stable-121d5713afeaf388bf996e20233142bd289b5f68.tar.bz2 linux-stable-121d5713afeaf388bf996e20233142bd289b5f68.zip | |
clk: renesas: rcar-gen4: Restore PLL enum sort order
When CLK_TYPE_GEN4_PLL4 was added to the rcar_gen4_clk_types enum, it
was inserted at a random location. Restore sort order of the clock
types referring to PLLs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/dbd61ed19f79e9ae751fbb533d6c946e810e4359.1669740824.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/clk/renesas')
| -rw-r--r-- | drivers/clk/renesas/rcar-gen4-cpg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/renesas/rcar-gen4-cpg.h b/drivers/clk/renesas/rcar-gen4-cpg.h index 0b15dcfdca7b..0a0e3bdb3a66 100644 --- a/drivers/clk/renesas/rcar-gen4-cpg.h +++ b/drivers/clk/renesas/rcar-gen4-cpg.h @@ -15,8 +15,8 @@ enum rcar_gen4_clk_types { CLK_TYPE_GEN4_PLL2, CLK_TYPE_GEN4_PLL2X_3X, /* r8a779a0 only */ CLK_TYPE_GEN4_PLL3, - CLK_TYPE_GEN4_PLL5, CLK_TYPE_GEN4_PLL4, + CLK_TYPE_GEN4_PLL5, CLK_TYPE_GEN4_PLL6, CLK_TYPE_GEN4_SDSRC, CLK_TYPE_GEN4_SDH, |