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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-09-26 17:01:48 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-10-17 10:03:59 +0200 |
| commit | 81e8dd07445eb330855d340a90918b872afa9232 (patch) | |
| tree | 2ba5f3cec323cdf5fdbb3c933cd32daee2adc4d2 /drivers/clk/renesas | |
| parent | a3b4137a4d4023e6662a2e35579516c7a44bc1cb (diff) | |
| download | linux-stable-81e8dd07445eb330855d340a90918b872afa9232.tar.gz linux-stable-81e8dd07445eb330855d340a90918b872afa9232.tar.bz2 linux-stable-81e8dd07445eb330855d340a90918b872afa9232.zip | |
clk: renesas: r8a779g0: Add SYS-DMAC clocks
Add the module clocks used by the Direct Memory Access Controllers for
System (SYS-DMAC) on the Renesas R-Car V4H (R8A779G0) SoC.
Extracted from a larger patch in the BSP by Kazuya Mizuguchi.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/d9f8322d362c7cebb29bfa7e128b4974882c4a7d.1664204336.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/clk/renesas')
| -rw-r--r-- | drivers/clk/renesas/r8a779g0-cpg-mssr.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index 9641122133b5..8397996e1f47 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -163,6 +163,8 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { DEF_MOD("i2c3", 521, R8A779G0_CLK_S0D6_PER), DEF_MOD("i2c4", 522, R8A779G0_CLK_S0D6_PER), DEF_MOD("i2c5", 523, R8A779G0_CLK_S0D6_PER), + DEF_MOD("sydm0", 709, R8A779G0_CLK_S0D6_PER), + DEF_MOD("sydm1", 710, R8A779G0_CLK_S0D6_PER), DEF_MOD("wdt1:wdt0", 907, R8A779G0_CLK_R), DEF_MOD("pfc0", 915, R8A779G0_CLK_CL16M), DEF_MOD("pfc1", 916, R8A779G0_CLK_CL16M), |