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| author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2022-06-13 20:56:27 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-06-17 09:14:13 +0200 |
| commit | b7f64eaee5a345fe0c454f939252b46a26b47434 (patch) | |
| tree | 3eada10bbce3d37649e54b69afd8c217c380a351 /drivers/clk/renesas | |
| parent | d5c10876c76f6110a968c4afa065ef09a8630868 (diff) | |
| download | linux-stable-b7f64eaee5a345fe0c454f939252b46a26b47434.tar.gz linux-stable-b7f64eaee5a345fe0c454f939252b46a26b47434.tar.bz2 linux-stable-b7f64eaee5a345fe0c454f939252b46a26b47434.zip | |
clk: renesas: r8a779f0: Add PCIe clocks
Add the module clocks used by the PCIe controllers on the Renesas
R-Car S4-8 (R8A779F0) SoC.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220613115627.2831257-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas')
| -rw-r--r-- | drivers/clk/renesas/r8a779f0-cpg-mssr.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c index ac0383c38aee..4610d6bd8b3b 100644 --- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c @@ -126,6 +126,8 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = { DEF_MOD("i2c3", 521, R8A779F0_CLK_S0D6_PER), DEF_MOD("i2c4", 522, R8A779F0_CLK_S0D6_PER), DEF_MOD("i2c5", 523, R8A779F0_CLK_S0D6_PER), + DEF_MOD("pcie0", 624, R8A779F0_CLK_S0D2), + DEF_MOD("pcie1", 625, R8A779F0_CLK_S0D2), DEF_MOD("scif0", 702, R8A779F0_CLK_S0D12_PER), DEF_MOD("scif1", 703, R8A779F0_CLK_S0D12_PER), DEF_MOD("scif3", 704, R8A779F0_CLK_S0D12_PER), |