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author | Elaine Zhang <zhangqing@rock-chips.com> | 2022-10-18 17:14:07 +0200 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2022-11-15 11:37:41 +0100 |
commit | f1c506d152ff235ad621d3c25d061cb16da67214 (patch) | |
tree | 62f295cf3fcb13706e78dbcf0a6295893b03a649 /drivers/clk/rockchip/Makefile | |
parent | ada8f95ba04e8fe07289b7de157ae99bb96bc8cb (diff) | |
download | linux-stable-f1c506d152ff235ad621d3c25d061cb16da67214.tar.gz linux-stable-f1c506d152ff235ad621d3c25d061cb16da67214.tar.bz2 linux-stable-f1c506d152ff235ad621d3c25d061cb16da67214.zip |
clk: rockchip: add clock controller for the RK3588
Add full clock controller support RK3588.
[rebase, integrate fixes from Wyon and Finley, add missing frequencies
to PLL lookup table, update commit message, add GATE_LINK clocks which
downstream handles in its own driver with one DT node per clock]
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20221018151407.63395-10-sebastian.reichel@collabora.com
[dropped module stuff after talking to Sebastian]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip/Makefile')
-rw-r--r-- | drivers/clk/rockchip/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile index e8543876c056..36894f6a7022 100644 --- a/drivers/clk/rockchip/Makefile +++ b/drivers/clk/rockchip/Makefile @@ -28,3 +28,4 @@ obj-$(CONFIG_CLK_RK3328) += clk-rk3328.o obj-$(CONFIG_CLK_RK3368) += clk-rk3368.o obj-$(CONFIG_CLK_RK3399) += clk-rk3399.o obj-$(CONFIG_CLK_RK3568) += clk-rk3568.o +obj-$(CONFIG_CLK_RK3588) += clk-rk3588.o rst-rk3588.o |