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| author | Dinh Nguyen <dinguyen@kernel.org> | 2021-03-02 15:41:49 -0600 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-03-30 19:26:26 -0700 |
| commit | 2c2b9c6067170de2a63e7e3d9f5bb205b870de7c (patch) | |
| tree | cfe2e8431e46f3a37f9fc94f29ee863e21ea16f3 /drivers/clk/socfpga/clk-gate.c | |
| parent | a38fd8748464831584a19438cbb3082b5a2dab15 (diff) | |
| download | linux-stable-2c2b9c6067170de2a63e7e3d9f5bb205b870de7c.tar.gz linux-stable-2c2b9c6067170de2a63e7e3d9f5bb205b870de7c.tar.bz2 linux-stable-2c2b9c6067170de2a63e7e3d9f5bb205b870de7c.zip | |
clk: socfpga: use clk_hw_register for a5/c5
As recommended by Stephen Boyd, convert the cyclone5/arria5 clock driver
to use the clk_hw registration method.
Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210302214151.1333447-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/socfpga/clk-gate.c')
| -rw-r--r-- | drivers/clk/socfpga/clk-gate.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c index 43ecd507bf83..b17aba5799d2 100644 --- a/drivers/clk/socfpga/clk-gate.c +++ b/drivers/clk/socfpga/clk-gate.c @@ -174,13 +174,14 @@ void __init socfpga_gate_init(struct device_node *node) u32 div_reg[3]; u32 clk_phase[2]; u32 fixed_div; - struct clk *clk; + struct clk_hw *hw_clk; struct socfpga_gate_clk *socfpga_clk; const char *clk_name = node->name; const char *parent_name[SOCFPGA_MAX_PARENTS]; struct clk_init_data init; struct clk_ops *ops; int rc; + int err; socfpga_clk = kzalloc(sizeof(*socfpga_clk), GFP_KERNEL); if (WARN_ON(!socfpga_clk)) @@ -238,12 +239,14 @@ void __init socfpga_gate_init(struct device_node *node) init.parent_names = parent_name; socfpga_clk->hw.hw.init = &init; - clk = clk_register(NULL, &socfpga_clk->hw.hw); - if (WARN_ON(IS_ERR(clk))) { + hw_clk = &socfpga_clk->hw.hw; + + err = clk_hw_register(NULL, hw_clk); + if (err) { kfree(socfpga_clk); return; } - rc = of_clk_add_provider(node, of_clk_src_simple_get, clk); + rc = of_clk_add_provider(node, of_clk_src_simple_get, hw_clk); if (WARN_ON(rc)) return; } |