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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-10-13 12:44:55 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-01-23 11:44:26 +0100 |
| commit | d77e8135b3405dd08a6bf05613d765cbd0bfd5a6 (patch) | |
| tree | 0bbbefe1f264290af4434fdfcf45a9723ab62315 /drivers/clk/sunxi-ng/ccu_mult.c | |
| parent | d0f11d14b0bc673db36e64814ac9cd1a17de09c9 (diff) | |
| download | linux-stable-d77e8135b3405dd08a6bf05613d765cbd0bfd5a6.tar.gz linux-stable-d77e8135b3405dd08a6bf05613d765cbd0bfd5a6.tar.bz2 linux-stable-d77e8135b3405dd08a6bf05613d765cbd0bfd5a6.zip | |
clk: sunxi-ng: multiplier: Add fractional support
Some clocks on the earlier SoCs such as the video PLLs are multipliers with
fractional settings.
Support those cases.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu_mult.c')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu_mult.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clk/sunxi-ng/ccu_mult.c b/drivers/clk/sunxi-ng/ccu_mult.c index 678b6cb49f01..826302464650 100644 --- a/drivers/clk/sunxi-ng/ccu_mult.c +++ b/drivers/clk/sunxi-ng/ccu_mult.c @@ -75,6 +75,9 @@ static unsigned long ccu_mult_recalc_rate(struct clk_hw *hw, unsigned long val; u32 reg; + if (ccu_frac_helper_is_enabled(&cm->common, &cm->frac)) + return ccu_frac_helper_read_rate(&cm->common, &cm->frac); + reg = readl(cm->common.base + cm->common.reg); val = reg >> cm->mult.shift; val &= (1 << cm->mult.width) - 1; @@ -102,6 +105,11 @@ static int ccu_mult_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long flags; u32 reg; + if (ccu_frac_helper_has_rate(&cm->common, &cm->frac, rate)) + return ccu_frac_helper_set_rate(&cm->common, &cm->frac, rate); + else + ccu_frac_helper_disable(&cm->common, &cm->frac); + ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1, &parent_rate); |