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| author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2023-06-01 11:39:07 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-06-13 16:15:04 -0700 |
| commit | 501624339466a7896bb8a1f048cf8dcfd54b174e (patch) | |
| tree | f64d0e6589d4bde0795924e309fd100deb3cf1bc /drivers/clk | |
| parent | 5ae7899765607e97e5eb34486336898c8d9ec654 (diff) | |
| download | linux-stable-501624339466a7896bb8a1f048cf8dcfd54b174e.tar.gz linux-stable-501624339466a7896bb8a1f048cf8dcfd54b174e.tar.bz2 linux-stable-501624339466a7896bb8a1f048cf8dcfd54b174e.zip | |
clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
The "vanilla" Alpha PLL configs are sometimes provided with an intention
to only update certain bits of th register.
Do so if a mask is found.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Iskren Chernev <me@iskren.info>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230601-topic-alpha_ctl-v1-1-b6a932dfcf68@linaro.org
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/qcom/clk-alpha-pll.c | 19 | ||||
| -rw-r--r-- | drivers/clk/qcom/clk-alpha-pll.h | 2 |
2 files changed, 17 insertions, 4 deletions
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index f81c7c561352..e4ef645f65d1 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -384,10 +384,21 @@ void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val); - clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), - config->test_ctl_val); - clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), - config->test_ctl_hi_val); + if (config->test_ctl_mask) + regmap_update_bits(regmap, PLL_TEST_CTL(pll), + config->test_ctl_mask, + config->test_ctl_val); + else + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), + config->test_ctl_val); + + if (config->test_ctl_hi_mask) + regmap_update_bits(regmap, PLL_TEST_CTL_U(pll), + config->test_ctl_hi_mask, + config->test_ctl_hi_val); + else + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), + config->test_ctl_hi_val); if (pll->flags & SUPPORTS_FSM_MODE) qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0); diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h index 6ff0d08eb938..e4bd863027ab 100644 --- a/drivers/clk/qcom/clk-alpha-pll.h +++ b/drivers/clk/qcom/clk-alpha-pll.h @@ -123,7 +123,9 @@ struct alpha_pll_config { u32 user_ctl_hi_val; u32 user_ctl_hi1_val; u32 test_ctl_val; + u32 test_ctl_mask; u32 test_ctl_hi_val; + u32 test_ctl_hi_mask; u32 test_ctl_hi1_val; u32 test_ctl_hi2_val; u32 main_output_mask; |