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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-01-03 16:54:56 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-01-10 15:58:59 -0600 |
| commit | a9e46af1718a206b79f8801ad258e773cec81c49 (patch) | |
| tree | 69bcbcd61d0d2179ed483bd53ffac346a231360a /drivers/clk | |
| parent | 5c0df30cb3e431b9bcc10b457bb9fda388842035 (diff) | |
| download | linux-stable-a9e46af1718a206b79f8801ad258e773cec81c49.tar.gz linux-stable-a9e46af1718a206b79f8801ad258e773cec81c49.tar.bz2 linux-stable-a9e46af1718a206b79f8801ad258e773cec81c49.zip | |
clk: qcom: dispcc-sc7180: switch to parent_hws
Change several entries of parent_data to use parent_hws instead, which
results in slightly more ovbious code.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103145515.1164020-3-dmitry.baryshkov@linaro.org
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/qcom/dispcc-sc7180.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/qcom/dispcc-sc7180.c b/drivers/clk/qcom/dispcc-sc7180.c index 5d2ae297e741..9536bfc72a43 100644 --- a/drivers/clk/qcom/dispcc-sc7180.c +++ b/drivers/clk/qcom/dispcc-sc7180.c @@ -351,8 +351,8 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = { .width = 2, .clkr.hw.init = &(struct clk_init_data) { .name = "disp_cc_mdss_byte0_div_clk_src", - .parent_data = &(const struct clk_parent_data){ - .hw = &disp_cc_mdss_byte0_clk_src.clkr.hw + .parent_hws = (const struct clk_hw*[]) { + &disp_cc_mdss_byte0_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_regmap_div_ops, @@ -365,8 +365,8 @@ static struct clk_regmap_div disp_cc_mdss_dp_link_div_clk_src = { .width = 2, .clkr.hw.init = &(struct clk_init_data) { .name = "disp_cc_mdss_dp_link_div_clk_src", - .parent_data = &(const struct clk_parent_data){ - .hw = &disp_cc_mdss_dp_link_clk_src.clkr.hw + .parent_hws = (const struct clk_hw*[]) { + &disp_cc_mdss_dp_link_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_regmap_div_ops, |