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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-10-07 15:10:03 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-10-26 12:38:01 +0200 |
| commit | b00bf771ab4ae68ffbb111c2004e98a726c126c4 (patch) | |
| tree | bbf3afd94097a7d560c7ed740664e13d9d9e8396 /drivers/clk | |
| parent | ceb22d9312b3dcb3568da7ab0d62aea8b8bf0a15 (diff) | |
| download | linux-stable-b00bf771ab4ae68ffbb111c2004e98a726c126c4.tar.gz linux-stable-b00bf771ab4ae68ffbb111c2004e98a726c126c4.tar.bz2 linux-stable-b00bf771ab4ae68ffbb111c2004e98a726c126c4.zip | |
clk: renesas: r8a779g0: Add PWM clock
Add the module clock used by the PWM timers on the Renesas R-Car V4H
(R8A779G0) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/a33d0e51c2fe8a0e6c89f3fd92db7c4bf5c33074.1665147497.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/renesas/r8a779g0-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index c8c143c31b2b..1215b6f516ea 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -175,6 +175,7 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { DEF_MOD("msi3", 621, R8A779G0_CLK_MSO), DEF_MOD("msi4", 622, R8A779G0_CLK_MSO), DEF_MOD("msi5", 623, R8A779G0_CLK_MSO), + DEF_MOD("pwm", 628, R8A779G0_CLK_SASYNCPERD4), DEF_MOD("scif0", 702, R8A779G0_CLK_SASYNCPERD4), DEF_MOD("scif1", 703, R8A779G0_CLK_SASYNCPERD4), DEF_MOD("scif3", 704, R8A779G0_CLK_SASYNCPERD4), |