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author | Corentin Labbe <clabbe@baylibre.com> | 2021-05-05 20:26:10 +0000 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2021-05-14 19:07:56 +0800 |
commit | dfb098d692eac2a11a7051dfe87be98cd90da67d (patch) | |
tree | 4e526234d27e3a3df87997a0fd7f5feea6e37a76 /drivers/crypto/Kconfig | |
parent | e8acf011f2e7e21a7e2fae47cbaa06598e533d40 (diff) | |
download | linux-stable-dfb098d692eac2a11a7051dfe87be98cd90da67d.tar.gz linux-stable-dfb098d692eac2a11a7051dfe87be98cd90da67d.tar.bz2 linux-stable-dfb098d692eac2a11a7051dfe87be98cd90da67d.zip |
crypto: ixp4xx - fallback when having more than one SG
Testing ixp4xx_crypto lead to:
alg: skcipher: ecb(des)-ixp4xx encryption overran dst buffer on test vector 0, cfg="two even aligned splits"
The HW overwrites destination always when sg_nents() > 1.
The problem seems that the HW always write areq->cryptlen bytes on the
last SG.
A comment in driver's code seems to give a clue that multiple SG was not
planned "This was never tested by Intel for more than one dst buffer, I think".
So let's add a fallback for this situation.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/Kconfig')
-rw-r--r-- | drivers/crypto/Kconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index 1fe5b7eafc02..1d5b342e6b42 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -325,6 +325,11 @@ config CRYPTO_DEV_TALITOS2 config CRYPTO_DEV_IXP4XX tristate "Driver for IXP4xx crypto hardware acceleration" depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE + select CRYPTO_AES + select CRYPTO_DES + select CRYPTO_ECB + select CRYPTO_CBC + select CRYPTO_CTR select CRYPTO_LIB_DES select CRYPTO_AEAD select CRYPTO_AUTHENC |