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| author | Marco Chiappero <marco.chiappero@intel.com> | 2020-10-12 21:38:32 +0100 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2020-10-30 17:34:54 +1100 |
| commit | ad1332aa67eca6223b130cb593621ee16439b902 (patch) | |
| tree | 2369c5aaafe8e87733ade2eddbe9c1886d2c0d58 /drivers/crypto/qat/qat_c3xxx | |
| parent | 369eb4aaae46b1e40142fbe0ef27b2646c21e1e9 (diff) | |
| download | linux-stable-ad1332aa67eca6223b130cb593621ee16439b902.tar.gz linux-stable-ad1332aa67eca6223b130cb593621ee16439b902.tar.bz2 linux-stable-ad1332aa67eca6223b130cb593621ee16439b902.zip | |
crypto: qat - add support for capability detection
Add logic to detect device capabilities for c62x, c3xxx and dh895xcc.
Read fuses, straps and legfuses CSRs and build the device capabilities
mask. This will be used to understand if a certain service is supported
by a device.
This patch is based on earlier work done by Conor McLoughlin.
Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
Co-developed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/qat/qat_c3xxx')
| -rw-r--r-- | drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c | 2 | ||||
| -rw-r--r-- | drivers/crypto/qat/qat_c3xxx/adf_drv.c | 5 |
2 files changed, 4 insertions, 3 deletions
diff --git a/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c b/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c index f3f33dc0c316..eb45f1b1ae3e 100644 --- a/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c +++ b/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c @@ -5,6 +5,7 @@ #include <adf_pf2vf_msg.h> #include <adf_gen2_hw_data.h> #include "adf_c3xxx_hw_data.h" +#include "icp_qat_hw.h" /* Worker thread to service arbiter mappings based on dev SKUs */ static const u32 thrd_to_arb_map_6_me_sku[] = { @@ -195,6 +196,7 @@ void adf_init_hw_data_c3xxx(struct adf_hw_device_data *hw_data) hw_data->enable_error_correction = adf_enable_error_correction; hw_data->get_accel_mask = get_accel_mask; hw_data->get_ae_mask = get_ae_mask; + hw_data->get_accel_cap = adf_gen2_get_accel_cap; hw_data->get_num_accels = get_num_accels; hw_data->get_num_aes = get_num_aes; hw_data->get_sram_bar_id = get_sram_bar_id; diff --git a/drivers/crypto/qat/qat_c3xxx/adf_drv.c b/drivers/crypto/qat/qat_c3xxx/adf_drv.c index da6e88026988..7fb3343ae8b0 100644 --- a/drivers/crypto/qat/qat_c3xxx/adf_drv.c +++ b/drivers/crypto/qat/qat_c3xxx/adf_drv.c @@ -177,9 +177,8 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) goto out_err_disable; } - /* Read accelerator capabilities mask */ - pci_read_config_dword(pdev, ADF_DEVICE_LEGFUSE_OFFSET, - &hw_data->accel_capabilities_mask); + /* Get accelerator capabilities mask */ + hw_data->accel_capabilities_mask = hw_data->get_accel_cap(accel_dev); /* Find and map all the device's BARS */ i = 0; |