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author | Antoine Ténart <antoine.tenart@free-electrons.com> | 2017-06-15 09:56:18 +0200 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2017-06-20 11:21:41 +0800 |
commit | aefa794efed40cc6f8225646d75deda879b98256 (patch) | |
tree | 0ba8c451182152e3a15e2fbd206121072fe8833f /drivers/crypto | |
parent | aed3731e9039285c1d98f7636f5be92ea5db9e6a (diff) | |
download | linux-stable-aefa794efed40cc6f8225646d75deda879b98256.tar.gz linux-stable-aefa794efed40cc6f8225646d75deda879b98256.tar.bz2 linux-stable-aefa794efed40cc6f8225646d75deda879b98256.zip |
crypto: inside-secure - fix the ring wr_cache offset
The EIP197_HIA_xDR_CFG_WR_CACHE macro was defined to use an offset of
23, which is wrong as it's actually 25. Fix this.
Reported-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r-- | drivers/crypto/inside-secure/safexcel.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/inside-secure/safexcel.h b/drivers/crypto/inside-secure/safexcel.h index c17fdd40b99f..0328a9314b90 100644 --- a/drivers/crypto/inside-secure/safexcel.h +++ b/drivers/crypto/inside-secure/safexcel.h @@ -99,7 +99,7 @@ #define EIP197_HIA_xDR_WR_RES_BUF BIT(22) #define EIP197_HIA_xDR_WR_CTRL_BUG BIT(23) #define EIP197_HIA_xDR_WR_OWN_BUF BIT(24) -#define EIP197_HIA_xDR_CFG_WR_CACHE(n) (((n) & 0x7) << 23) +#define EIP197_HIA_xDR_CFG_WR_CACHE(n) (((n) & 0x7) << 25) #define EIP197_HIA_xDR_CFG_RD_CACHE(n) (((n) & 0x7) << 29) /* EIP197_HIA_CDR_THRESH */ |