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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-10-12 20:36:16 +0900
committerLinus Walleij <linus.walleij@linaro.org>2017-10-23 10:37:31 +0200
commitdbe776c2ca54c3070358640fdf2fb28aeaa17d31 (patch)
tree170ee9601149006dbc86d8ce9126791d98f21c1e /drivers/gpio/Kconfig
parent1c59d045058750904926d5883ce8acdedbc52df3 (diff)
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gpio: uniphier: add UniPhier GPIO controller driver
This GPIO controller is used on UniPhier SoC family. It also serves as an interrupt controller, but interrupt signals are just delivered to the parent irqchip without any latching or OR'ing. This type of hardware can be well described with hierarchy IRQ domain. One unfortunate thing for this device is that the interrupt mapping to the interrupt parent is not contiguous. I asked how DT can describe interrupt mapping between two irqchips [1], but I could not find a good solution (at least in the framework level). In fact, irqchip drivers using hierarchy domain generally hard-code the DT binding of their parent. After tackling on several approaches such as hard-code of hwirqs, irq_domain_push_irq(), I ended up with a vendor specific property. If we come up with a good idea to support this in the framework, we can migrate over to it, but we can live with a driver-level solution for now. [1] https://lkml.org/lkml/2017/7/6/758 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/Kconfig')
-rw-r--r--drivers/gpio/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index d5282cac6ea6..e7f3f39e69df 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -474,6 +474,14 @@ config GPIO_TZ1090_PDC
help
Say yes here to support Toumaz Xenif TZ1090 PDC GPIOs.
+config GPIO_UNIPHIER
+ tristate "UniPhier GPIO support"
+ depends on ARCH_UNIPHIER || COMPILE_TEST
+ depends on OF_GPIO
+ select IRQ_DOMAIN_HIERARCHY
+ help
+ Say yes here to support UniPhier GPIOs.
+
config GPIO_VF610
def_bool y
depends on ARCH_MXC && SOC_VF610