drm/amdgpu: Use function for IP version check

Use an inline function for version check. Gives more flexibility to
handle any format changes.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 45 insertions, 47 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 961a642f5bde..40a059feb8c5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -311,8 +311,8 @@ static void amdgpu_discovery_harvest_config_quirk(struct amdgpu_device *adev)
 	 * So far, apply this quirk only on those Navy Flounder boards which
 	 * have a bad harvest table of VCN config.
 	 */
-	if ((adev->ip_versions[UVD_HWIP][1] == IP_VERSION(3, 0, 1)) &&
-		(adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 2))) {
+	if ((amdgpu_ip_version(adev, UVD_HWIP, 1) == IP_VERSION(3, 0, 1)) &&
+	    (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(10, 3, 2))) {
 		switch (adev->pdev->revision) {
 		case 0xC1:
 		case 0xC2:
@@ -1363,8 +1363,8 @@ static void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev)
 	 * so read harvest bit per IP data structure to set
 	 * harvest configuration.
 	 */
-	if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0) &&
-	    adev->ip_versions[GC_HWIP][0] != IP_VERSION(9, 4, 3)) {
+	if (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(10, 2, 0) &&
+	    amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 3)) {
 		if ((adev->pdev->device == 0x731E &&
 			(adev->pdev->revision == 0xC6 ||
 			 adev->pdev->revision == 0xC7)) ||
@@ -1607,7 +1607,7 @@ static int amdgpu_discovery_get_vcn_info(struct amdgpu_device *adev)
 static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev)
 {
 	/* what IP to use for this? */
-	switch (adev->ip_versions[GC_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
 	case IP_VERSION(9, 0, 1):
 	case IP_VERSION(9, 1, 0):
 	case IP_VERSION(9, 2, 1):
@@ -1645,7 +1645,7 @@ static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev)
 	default:
 		dev_err(adev->dev,
 			"Failed to add common ip block(GC_HWIP:0x%x)\n",
-			adev->ip_versions[GC_HWIP][0]);
+			amdgpu_ip_version(adev, GC_HWIP, 0));
 		return -EINVAL;
 	}
 	return 0;
@@ -1654,7 +1654,7 @@ static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev)
 static int amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device *adev)
 {
 	/* use GC or MMHUB IP version */
-	switch (adev->ip_versions[GC_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
 	case IP_VERSION(9, 0, 1):
 	case IP_VERSION(9, 1, 0):
 	case IP_VERSION(9, 2, 1):
@@ -1690,9 +1690,8 @@ static int amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device *adev)
 		amdgpu_device_ip_block_add(adev, &gmc_v11_0_ip_block);
 		break;
 	default:
-		dev_err(adev->dev,
-			"Failed to add gmc ip block(GC_HWIP:0x%x)\n",
-			adev->ip_versions[GC_HWIP][0]);
+		dev_err(adev->dev, "Failed to add gmc ip block(GC_HWIP:0x%x)\n",
+			amdgpu_ip_version(adev, GC_HWIP, 0));
 		return -EINVAL;
 	}
 	return 0;
@@ -1700,7 +1699,7 @@ static int amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device *adev)
 
 static int amdgpu_discovery_set_ih_ip_blocks(struct amdgpu_device *adev)
 {
-	switch (adev->ip_versions[OSSSYS_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, OSSSYS_HWIP, 0)) {
 	case IP_VERSION(4, 0, 0):
 	case IP_VERSION(4, 0, 1):
 	case IP_VERSION(4, 1, 0):
@@ -1733,7 +1732,7 @@ static int amdgpu_discovery_set_ih_ip_blocks(struct amdgpu_device *adev)
 	default:
 		dev_err(adev->dev,
 			"Failed to add ih ip block(OSSSYS_HWIP:0x%x)\n",
-			adev->ip_versions[OSSSYS_HWIP][0]);
+			amdgpu_ip_version(adev, OSSSYS_HWIP, 0));
 		return -EINVAL;
 	}
 	return 0;
@@ -1741,7 +1740,7 @@ static int amdgpu_discovery_set_ih_ip_blocks(struct amdgpu_device *adev)
 
 static int amdgpu_discovery_set_psp_ip_blocks(struct amdgpu_device *adev)
 {
-	switch (adev->ip_versions[MP0_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) {
 	case IP_VERSION(9, 0, 0):
 		amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);
 		break;
@@ -1787,7 +1786,7 @@ static int amdgpu_discovery_set_psp_ip_blocks(struct amdgpu_device *adev)
 	default:
 		dev_err(adev->dev,
 			"Failed to add psp ip block(MP0_HWIP:0x%x)\n",
-			adev->ip_versions[MP0_HWIP][0]);
+			amdgpu_ip_version(adev, MP0_HWIP, 0));
 		return -EINVAL;
 	}
 	return 0;
@@ -1795,7 +1794,7 @@ static int amdgpu_discovery_set_psp_ip_blocks(struct amdgpu_device *adev)
 
 static int amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device *adev)
 {
-	switch (adev->ip_versions[MP1_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
 	case IP_VERSION(9, 0, 0):
 	case IP_VERSION(10, 0, 0):
 	case IP_VERSION(10, 0, 1):
@@ -1836,7 +1835,7 @@ static int amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device *adev)
 	default:
 		dev_err(adev->dev,
 			"Failed to add smu ip block(MP1_HWIP:0x%x)\n",
-			adev->ip_versions[MP1_HWIP][0]);
+			amdgpu_ip_version(adev, MP1_HWIP, 0));
 		return -EINVAL;
 	}
 	return 0;
@@ -1861,8 +1860,8 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev)
 		return 0;
 
 #if defined(CONFIG_DRM_AMD_DC)
-	if (adev->ip_versions[DCE_HWIP][0]) {
-		switch (adev->ip_versions[DCE_HWIP][0]) {
+	if (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
+		switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
 		case IP_VERSION(1, 0, 0):
 		case IP_VERSION(1, 0, 1):
 		case IP_VERSION(2, 0, 2):
@@ -1888,11 +1887,11 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev)
 		default:
 			dev_err(adev->dev,
 				"Failed to add dm ip block(DCE_HWIP:0x%x)\n",
-				adev->ip_versions[DCE_HWIP][0]);
+				amdgpu_ip_version(adev, DCE_HWIP, 0));
 			return -EINVAL;
 		}
-	} else if (adev->ip_versions[DCI_HWIP][0]) {
-		switch (adev->ip_versions[DCI_HWIP][0]) {
+	} else if (amdgpu_ip_version(adev, DCI_HWIP, 0)) {
+		switch (amdgpu_ip_version(adev, DCI_HWIP, 0)) {
 		case IP_VERSION(12, 0, 0):
 		case IP_VERSION(12, 0, 1):
 		case IP_VERSION(12, 1, 0):
@@ -1904,7 +1903,7 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev)
 		default:
 			dev_err(adev->dev,
 				"Failed to add dm ip block(DCI_HWIP:0x%x)\n",
-				adev->ip_versions[DCI_HWIP][0]);
+				amdgpu_ip_version(adev, DCI_HWIP, 0));
 			return -EINVAL;
 		}
 	}
@@ -1914,7 +1913,7 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev)
 
 static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev)
 {
-	switch (adev->ip_versions[GC_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
 	case IP_VERSION(9, 0, 1):
 	case IP_VERSION(9, 1, 0):
 	case IP_VERSION(9, 2, 1):
@@ -1954,9 +1953,8 @@ static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev)
 		amdgpu_device_ip_block_add(adev, &gfx_v11_0_ip_block);
 		break;
 	default:
-		dev_err(adev->dev,
-			"Failed to add gfx ip block(GC_HWIP:0x%x)\n",
-			adev->ip_versions[GC_HWIP][0]);
+		dev_err(adev->dev, "Failed to add gfx ip block(GC_HWIP:0x%x)\n",
+			amdgpu_ip_version(adev, GC_HWIP, 0));
 		return -EINVAL;
 	}
 	return 0;
@@ -1964,7 +1962,7 @@ static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev)
 
 static int amdgpu_discovery_set_sdma_ip_blocks(struct amdgpu_device *adev)
 {
-	switch (adev->ip_versions[SDMA0_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {
 	case IP_VERSION(4, 0, 0):
 	case IP_VERSION(4, 0, 1):
 	case IP_VERSION(4, 1, 0):
@@ -2004,7 +2002,7 @@ static int amdgpu_discovery_set_sdma_ip_blocks(struct amdgpu_device *adev)
 	default:
 		dev_err(adev->dev,
 			"Failed to add sdma ip block(SDMA0_HWIP:0x%x)\n",
-			adev->ip_versions[SDMA0_HWIP][0]);
+			amdgpu_ip_version(adev, SDMA0_HWIP, 0));
 		return -EINVAL;
 	}
 	return 0;
@@ -2012,8 +2010,8 @@ static int amdgpu_discovery_set_sdma_ip_blocks(struct amdgpu_device *adev)
 
 static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev)
 {
-	if (adev->ip_versions[VCE_HWIP][0]) {
-		switch (adev->ip_versions[UVD_HWIP][0]) {
+	if (amdgpu_ip_version(adev, VCE_HWIP, 0)) {
+		switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) {
 		case IP_VERSION(7, 0, 0):
 		case IP_VERSION(7, 2, 0):
 			/* UVD is not supported on vega20 SR-IOV */
@@ -2023,10 +2021,10 @@ static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev)
 		default:
 			dev_err(adev->dev,
 				"Failed to add uvd v7 ip block(UVD_HWIP:0x%x)\n",
-				adev->ip_versions[UVD_HWIP][0]);
+				amdgpu_ip_version(adev, UVD_HWIP, 0));
 			return -EINVAL;
 		}
-		switch (adev->ip_versions[VCE_HWIP][0]) {
+		switch (amdgpu_ip_version(adev, VCE_HWIP, 0)) {
 		case IP_VERSION(4, 0, 0):
 		case IP_VERSION(4, 1, 0):
 			/* VCE is not supported on vega20 SR-IOV */
@@ -2036,11 +2034,11 @@ static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev)
 		default:
 			dev_err(adev->dev,
 				"Failed to add VCE v4 ip block(VCE_HWIP:0x%x)\n",
-				adev->ip_versions[VCE_HWIP][0]);
+				amdgpu_ip_version(adev, VCE_HWIP, 0));
 			return -EINVAL;
 		}
 	} else {
-		switch (adev->ip_versions[UVD_HWIP][0]) {
+		switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) {
 		case IP_VERSION(1, 0, 0):
 		case IP_VERSION(1, 0, 1):
 			amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block);
@@ -2091,7 +2089,7 @@ static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev)
 		default:
 			dev_err(adev->dev,
 				"Failed to add vcn/jpeg ip block(UVD_HWIP:0x%x)\n",
-				adev->ip_versions[UVD_HWIP][0]);
+				amdgpu_ip_version(adev, UVD_HWIP, 0));
 			return -EINVAL;
 		}
 	}
@@ -2100,7 +2098,7 @@ static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev)
 
 static int amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device *adev)
 {
-	switch (adev->ip_versions[GC_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
 	case IP_VERSION(10, 1, 10):
 	case IP_VERSION(10, 1, 1):
 	case IP_VERSION(10, 1, 2):
@@ -2138,7 +2136,7 @@ static int amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device *adev)
 
 static void amdgpu_discovery_init_soc_config(struct amdgpu_device *adev)
 {
-	switch (adev->ip_versions[GC_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
 	case IP_VERSION(9, 4, 3):
 		aqua_vanjaram_init_soc_config(adev);
 		break;
@@ -2149,7 +2147,7 @@ static void amdgpu_discovery_init_soc_config(struct amdgpu_device *adev)
 
 static int amdgpu_discovery_set_vpe_ip_blocks(struct amdgpu_device *adev)
 {
-	switch (adev->ip_versions[VPE_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, VPE_HWIP, 0)) {
 	case IP_VERSION(6, 1, 0):
 		amdgpu_device_ip_block_add(adev, &vpe_v6_1_ip_block);
 		break;
@@ -2162,7 +2160,7 @@ static int amdgpu_discovery_set_vpe_ip_blocks(struct amdgpu_device *adev)
 
 static int amdgpu_discovery_set_umsch_mm_ip_blocks(struct amdgpu_device *adev)
 {
-	switch (adev->ip_versions[VCN_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, VCN_HWIP, 0)) {
 	case IP_VERSION(4, 0, 5):
 		if (amdgpu_umsch_mm & 0x1) {
 			amdgpu_device_ip_block_add(adev, &umsch_mm_v4_0_ip_block);
@@ -2356,7 +2354,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
 	amdgpu_discovery_init_soc_config(adev);
 	amdgpu_discovery_sysfs_init(adev);
 
-	switch (adev->ip_versions[GC_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
 	case IP_VERSION(9, 0, 1):
 	case IP_VERSION(9, 2, 1):
 	case IP_VERSION(9, 4, 0):
@@ -2410,7 +2408,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
 		return -EINVAL;
 	}
 
-	switch (adev->ip_versions[GC_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
 	case IP_VERSION(9, 1, 0):
 	case IP_VERSION(9, 2, 2):
 	case IP_VERSION(9, 3, 0):
@@ -2429,11 +2427,11 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
 		break;
 	}
 
-	if (adev->ip_versions[XGMI_HWIP][0] == IP_VERSION(4, 8, 0))
+	if (amdgpu_ip_version(adev, XGMI_HWIP, 0) == IP_VERSION(4, 8, 0))
 		adev->gmc.xgmi.supported = true;
 
 	/* set NBIO version */
-	switch (adev->ip_versions[NBIO_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) {
 	case IP_VERSION(6, 1, 0):
 	case IP_VERSION(6, 2, 0):
 		adev->nbio.funcs = &nbio_v6_1_funcs;
@@ -2495,7 +2493,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
 		break;
 	}
 
-	switch (adev->ip_versions[HDP_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, HDP_HWIP, 0)) {
 	case IP_VERSION(4, 0, 0):
 	case IP_VERSION(4, 0, 1):
 	case IP_VERSION(4, 1, 0):
@@ -2527,7 +2525,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
 		break;
 	}
 
-	switch (adev->ip_versions[DF_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, DF_HWIP, 0)) {
 	case IP_VERSION(3, 6, 0):
 	case IP_VERSION(3, 6, 1):
 	case IP_VERSION(3, 6, 2):
@@ -2547,7 +2545,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
 		break;
 	}
 
-	switch (adev->ip_versions[SMUIO_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, SMUIO_HWIP, 0)) {
 	case IP_VERSION(9, 0, 0):
 	case IP_VERSION(9, 0, 1):
 	case IP_VERSION(10, 0, 0):
@@ -2590,7 +2588,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
 		break;
 	}
 
-	switch (adev->ip_versions[LSDMA_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, LSDMA_HWIP, 0)) {
 	case IP_VERSION(6, 0, 0):
 	case IP_VERSION(6, 0, 1):
 	case IP_VERSION(6, 0, 2):