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| author | Nirmoy Das <nirmoy.das@amd.com> | 2020-04-01 11:46:57 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-04-09 10:43:14 -0400 |
| commit | 1c6d567bdf73a207f51ef2e5745854ba7daa22c7 (patch) | |
| tree | e6151dd92124773df4258b4847c1530d55108b2d /drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | |
| parent | 07e14845d1d866083c2679759e7591df3612af89 (diff) | |
| download | linux-stable-1c6d567bdf73a207f51ef2e5745854ba7daa22c7.tar.gz linux-stable-1c6d567bdf73a207f51ef2e5745854ba7daa22c7.tar.bz2 linux-stable-1c6d567bdf73a207f51ef2e5745854ba7daa22c7.zip | |
drm/amdgpu: rework sched_list generation
Generate HW IP's sched_list in amdgpu_ring_init() instead of
amdgpu_ctx.c. This makes amdgpu_ctx_init_compute_sched(),
ring.has_high_prio and amdgpu_ctx_init_sched() unnecessary.
This patch also stores sched_list for all HW IPs in one big
array in struct amdgpu_device which makes amdgpu_ctx_init_entity()
much more leaner.
v2:
fix a coding style issue
do not use drm hw_ip const to populate amdgpu_ring_type enum
v3:
remove ctx reference and move sched array and num_sched to a struct
use num_scheds to detect uninitialized scheduler list
v4:
use array_index_nospec for user space controlled variables
fix possible checkpatch.pl warnings
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h index 5825692d07e4..634746829024 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h @@ -286,13 +286,8 @@ struct amdgpu_gfx { bool me_fw_write_wait; bool cp_fw_write_wait; struct amdgpu_ring gfx_ring[AMDGPU_MAX_GFX_RINGS]; - struct drm_gpu_scheduler *gfx_sched[AMDGPU_MAX_GFX_RINGS]; - uint32_t num_gfx_sched; unsigned num_gfx_rings; struct amdgpu_ring compute_ring[AMDGPU_MAX_COMPUTE_RINGS]; - struct drm_gpu_scheduler **compute_prio_sched[AMDGPU_GFX_PIPE_PRIO_MAX]; - struct drm_gpu_scheduler *compute_sched[AMDGPU_MAX_COMPUTE_RINGS]; - uint32_t num_compute_sched[AMDGPU_GFX_PIPE_PRIO_MAX]; unsigned num_compute_rings; struct amdgpu_irq_src eop_irq; struct amdgpu_irq_src priv_reg_irq; |