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| author | Luben Tuikov <luben.tuikov@amd.com> | 2021-03-11 17:12:32 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-07-01 00:24:40 -0400 |
| commit | 16ef797737c84462a3632dd4f8d77fe0f000428b (patch) | |
| tree | 976288ac8a75b99282e0387a2d1e9052d31beda8 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | |
| parent | 1fab841ff63d2b94673a46682098d86d67b195e2 (diff) | |
| download | linux-stable-16ef797737c84462a3632dd4f8d77fe0f000428b.tar.gz linux-stable-16ef797737c84462a3632dd4f8d77fe0f000428b.tar.bz2 linux-stable-16ef797737c84462a3632dd4f8d77fe0f000428b.zip | |
drm/amdgpu: EEPROM: add explicit read and write
Add explicit amdgpu_eeprom_read() and
amdgpu_eeprom_write() for clarity.
Cc: Jean Delvare <jdelvare@suse.de>
Cc: Alexander Deucher <Alexander.Deucher@amd.com>
Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Cc: Lijo Lazar <Lijo.Lazar@amd.com>
Cc: Stanley Yang <Stanley.Yang@amd.com>
Cc: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Acked-by: Alexander Deucher <Alexander.Deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c index 550a31953d2d..17cea35275e4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c @@ -151,9 +151,9 @@ static int __update_table_header(struct amdgpu_ras_eeprom_control *control, /* i2c may be unstable in gpu reset */ down_read(&adev->reset_sem); - ret = amdgpu_eeprom_xfer(&adev->pm.smu_i2c, - control->i2c_address + RAS_HDR_START, - buff, RAS_TABLE_HEADER_SIZE, false); + ret = amdgpu_eeprom_write(&adev->pm.smu_i2c, + control->i2c_address + RAS_HDR_START, + buff, RAS_TABLE_HEADER_SIZE); up_read(&adev->reset_sem); if (ret < 1) @@ -298,9 +298,9 @@ int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control, mutex_init(&control->tbl_mutex); /* Read/Create table header from EEPROM address 0 */ - ret = amdgpu_eeprom_xfer(&adev->pm.smu_i2c, + ret = amdgpu_eeprom_read(&adev->pm.smu_i2c, control->i2c_address + RAS_HDR_START, - buff, RAS_TABLE_HEADER_SIZE, true); + buff, RAS_TABLE_HEADER_SIZE); if (ret < 1) { DRM_ERROR("Failed to read EEPROM table header, ret:%d", ret); return ret; |