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| author | Ran Sun <sunran001@208suo.com> | 2023-08-02 03:03:11 +0000 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-08-09 09:43:02 -0400 |
| commit | 35c4b73ebe5fd5a89f20e943b733b549224f86eb (patch) | |
| tree | 3df3902480e1b2ce7196b3e73ec4222972986f55 /drivers/gpu/drm/amd/display/dc/clk_mgr | |
| parent | 5cc0ac067494b1b6d324cf9d391730b19e5b431f (diff) | |
| download | linux-stable-35c4b73ebe5fd5a89f20e943b733b549224f86eb.tar.gz linux-stable-35c4b73ebe5fd5a89f20e943b733b549224f86eb.tar.bz2 linux-stable-35c4b73ebe5fd5a89f20e943b733b549224f86eb.zip | |
drm/amd/display: Clean up errors in dcn316_smu.c
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: code indent should use tabs where possible
Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/clk_mgr')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c index 457a9254ae1c..3ed19197a755 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c @@ -34,23 +34,21 @@ #define MAX_INSTANCE 7 #define MAX_SEGMENT 6 -struct IP_BASE_INSTANCE -{ +struct IP_BASE_INSTANCE { unsigned int segment[MAX_SEGMENT]; }; -struct IP_BASE -{ +struct IP_BASE { struct IP_BASE_INSTANCE instance[MAX_INSTANCE]; }; static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x0243FC00, 0 } }, - { { 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0 } } } }; + { { 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0 } } } }; #define REG(reg_name) \ (MP0_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ## reg_name) |