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authorAustin Zheng <austin.zheng@amd.com>2023-06-01 15:16:45 -0400
committerAlex Deucher <alexander.deucher@amd.com>2023-06-15 10:44:49 -0400
commitda55037afde24d74a1a3f26e4d314f897f3432b4 (patch)
tree338931186f45ed3d08804771b757ab663c4bf8f3 /drivers/gpu/drm/amd/display/dc/dc.h
parentec7282bd2688c6c741c79f8696a68c6c0403cf2d (diff)
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drm/amd/display: Limit Minimum FreeSync Refresh Rate
Why: Some EDIDs report a minimum refresh rate lower than what HW can support How: Add a check to calculate minimum supported refresh rate with current timing and use that as the minimum if a lower one is passed in Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Austin Zheng <austin.zheng@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 5c906b007e4d..a239dcd8e9fb 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -266,6 +266,7 @@ struct dc_caps {
uint16_t subvp_pstate_allow_width_us;
uint16_t subvp_vertical_int_margin_us;
bool seamless_odm;
+ uint32_t max_v_total;
uint8_t subvp_drr_vblank_start_margin_us;
};