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| author | Leo (Hanghong) Ma <hanghong.ma@amd.com> | 2022-07-29 11:46:13 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-08-29 17:58:47 -0400 |
| commit | b09c1fff5a9350a65b16af44e74c9f9335d9ef09 (patch) | |
| tree | 9304dc9dcc9f9d588b5dd5852484e452aa210a74 /drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | |
| parent | 36527db318080d36138c802ca9e03a09e5a5fef2 (diff) | |
| download | linux-stable-b09c1fff5a9350a65b16af44e74c9f9335d9ef09.tar.gz linux-stable-b09c1fff5a9350a65b16af44e74c9f9335d9ef09.tar.bz2 linux-stable-b09c1fff5a9350a65b16af44e74c9f9335d9ef09.zip | |
drm/amd/display: Add support for visual confirm color
[Why]
We want to get the visual confirm color of the bottom-most pipe
for test automation.
[How]
Save the visual confirm color to plane_state before program to MPC;
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c index 9b5c0dab3f15..32d24365bce1 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c +++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c @@ -389,6 +389,37 @@ void dc_dmub_srv_query_caps_cmd(struct dmub_srv *dmub) } } +void dc_dmub_srv_get_visual_confirm_color_cmd(struct dc *dc, struct pipe_ctx *pipe_ctx) +{ + union dmub_rb_cmd cmd = { 0 }; + enum dmub_status status; + unsigned int panel_inst = 0; + + dc_get_edp_link_panel_inst(dc, pipe_ctx->stream->link, &panel_inst); + + memset(&cmd, 0, sizeof(cmd)); + + // Prepare fw command + cmd.visual_confirm_color.header.type = DMUB_CMD__GET_VISUAL_CONFIRM_COLOR; + cmd.visual_confirm_color.header.sub_type = 0; + cmd.visual_confirm_color.header.ret_status = 1; + cmd.visual_confirm_color.header.payload_bytes = sizeof(struct dmub_cmd_visual_confirm_color_data); + cmd.visual_confirm_color.visual_confirm_color_data.visual_confirm_color.panel_inst = panel_inst; + + // Send command to fw + status = dmub_srv_cmd_with_reply_data(dc->ctx->dmub_srv->dmub, &cmd); + + ASSERT(status == DMUB_STATUS_OK); + + // If command was processed, copy feature caps to dmub srv + if (status == DMUB_STATUS_OK && + cmd.visual_confirm_color.header.ret_status == 0) { + memcpy(&dc->ctx->dmub_srv->dmub->visual_confirm_color, + &cmd.visual_confirm_color.visual_confirm_color_data, + sizeof(struct dmub_visual_confirm_color)); + } +} + #ifdef CONFIG_DRM_AMD_DC_DCN /** * *********************************************************************************************** |