diff options
| author | Wenjing Liu <wenjing.liu@amd.com> | 2021-08-09 13:02:10 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-09-14 15:56:50 -0400 |
| commit | b25715a0155dc2b4efb1700aea829eac10832514 (patch) | |
| tree | 2c1653a0aab68645cd4cd9b364bbea7a6b0b9089 /drivers/gpu/drm/amd/display/dc/dc_dsc.h | |
| parent | e312af6c2a920b8df2adee1ae31f5c364a4091fb (diff) | |
| download | linux-stable-b25715a0155dc2b4efb1700aea829eac10832514.tar.gz linux-stable-b25715a0155dc2b4efb1700aea829eac10832514.tar.bz2 linux-stable-b25715a0155dc2b4efb1700aea829eac10832514.zip | |
drm/amd/display: expose dsc overhead bw in dc dsc header
[why]
DM needs to know how much overhead is added to DSC as result
of AMD internal DSC limitation.
Acked-by: Mikita Lipski <mikita.lipski@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_dsc.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_dsc.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dsc.h b/drivers/gpu/drm/amd/display/dc/dc_dsc.h index 16cc76ce3739..c8cc6a448c36 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_dsc.h +++ b/drivers/gpu/drm/amd/display/dc/dc_dsc.h @@ -81,6 +81,11 @@ bool dc_dsc_compute_config( uint32_t dc_dsc_stream_bandwidth_in_kbps(const struct dc_crtc_timing *timing, uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp); +uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps( + const struct dc_crtc_timing *timing, + const int num_slices_h, + const bool is_dp); + void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, uint32_t max_target_bpp_limit_override_x16, struct dc_dsc_policy *policy); |