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| author | Jun Lei <jun.lei@amd.com> | 2020-12-16 12:56:38 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-02-02 12:10:48 -0500 |
| commit | 43c78873133e58792166eea581c07d7894ff94f2 (patch) | |
| tree | bc2aee28a700940f5e5327da5c76704889c5f65b /drivers/gpu/drm/amd/display/dc/dc_hw_types.h | |
| parent | 30164a1657ef43fd65f2da43b36506982121d663 (diff) | |
| download | linux-stable-43c78873133e58792166eea581c07d7894ff94f2.tar.gz linux-stable-43c78873133e58792166eea581c07d7894ff94f2.tar.bz2 linux-stable-43c78873133e58792166eea581c07d7894ff94f2.zip | |
drm/amd/display: implement support for DID2.0 dsc passthrough
[Why]
Some panels contain active converters (e.g. DP to MIPI) which only support
restricted DSC configurations. DID2.0 adds support for such displays to
explicitly define per timing BPP restrictions on DSC. Ignoring these
restrictions leads to blackscreen.
[How]
Add parsing in DID2.0 parser to get this bpp info.
Add support in DSC module to constraint target bpp based
on this info.
Signed-off-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_hw_types.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h index b41e6367b15e..09e8be5f7a1e 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h @@ -769,6 +769,7 @@ struct dc_crtc_timing { #endif struct dc_crtc_timing_flags flags; + uint32_t dsc_fixed_bits_per_pixel_x16; /* DSC target bitrate in 1/16 of bpp (e.g. 128 -> 8bpp) */ struct dc_dsc_config dsc_cfg; }; |