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authorQingqing Zhuo <Qingqing.Zhuo@amd.com>2023-08-02 23:37:49 -0400
committerAlex Deucher <alexander.deucher@amd.com>2023-08-30 15:51:15 -0400
commit8774029f76b9806f2f3586bb0502408076767fd5 (patch)
treea464978c0ee5819f2caa3793a18908cb0c756455 /drivers/gpu/drm/amd/display/dc/dc_types.h
parent6f8b7565cca4b745da54b7d5f26b7b9265a5f330 (diff)
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drm/amd/display: Add DCN35 CLK_MGR
[Why & How] Add CLK_MGR handling for DCN35. v2: Drop stale SMU interfaces (Alex) Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_types.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc_types.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index 445ad79001ce..4b44c18a61a0 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -808,6 +808,7 @@ struct dc_context {
struct cp_psp cp_psp;
uint32_t *dcn_reg_offsets;
uint32_t *nbio_reg_offsets;
+ uint32_t *clk_reg_offsets;
};
/* DSC DPCD capabilities */