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authorYongqiang Sun <yongqiang.sun@amd.com>2019-01-25 14:40:14 -0500
committerAlex Deucher <alexander.deucher@amd.com>2019-02-19 15:58:27 -0500
commitd6001aed266391e05517ff03078c144d4b279d5d (patch)
treea1cd7030a53de296dad264489acac40afe5515e0 /drivers/gpu/drm/amd/display/dc/dce110
parentd8d2f174bcc2c26c3485c70e0c6fe22b27bce739 (diff)
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drm/amd/display: Refactor for setup periodic interrupt.
[Why] Current periodic interrupt start point calc in optc is not clear. [How] 1. DM convert delta time to lines number and dc will calculate the start position as per lines number and interrupt type. 2. hwss calculates the start point as per line offset. 3. optc programs vertical interrupts register as per start point and interrupt source. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce110')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 42ee0a6eeec0..5e4db3712eef 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1333,10 +1333,8 @@ static enum dc_status apply_single_controller_ctx_to_hw(
if (!pipe_ctx->stream->apply_seamless_boot_optimization)
dc->hwss.enable_stream_timing(pipe_ctx, context, dc);
- if (pipe_ctx->stream_res.tg->funcs->program_vupdate_interrupt)
- pipe_ctx->stream_res.tg->funcs->program_vupdate_interrupt(
- pipe_ctx->stream_res.tg,
- &stream->timing);
+ if (dc->hwss.setup_vupdate_interrupt)
+ dc->hwss.setup_vupdate_interrupt(pipe_ctx);
params.vertical_total_min = stream->adjust.v_total_min;
params.vertical_total_max = stream->adjust.v_total_max;