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author | Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> | 2017-03-23 15:27:15 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 17:21:04 -0400 |
commit | 667e1498a9d0e43849fa84c1c6874184b33aee5f (patch) | |
tree | 298606c3350062177be585f64ab1203e4cdbc22a /drivers/gpu/drm/amd/display/dc/dce120 | |
parent | 5e141de45218d36a6b98c783834684fd0d617f7a (diff) | |
download | linux-stable-667e1498a9d0e43849fa84c1c6874184b33aee5f.tar.gz linux-stable-667e1498a9d0e43849fa84c1c6874184b33aee5f.tar.bz2 linux-stable-667e1498a9d0e43849fa84c1c6874184b33aee5f.zip |
drm/amd/display: use CRTC_VERTICAL_INTERRUPT0 as VBLANK trigger.
VBLANK interrupt is driven bu line buffer vcounter which is
ahead of CRTC vcounter. Use an interrupt that fires at the actual
CRTC vblank start boundry.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce120')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c index d7e787b591a0..95cb1768aeb5 100644 --- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c @@ -1039,6 +1039,35 @@ void dce120_timing_generator_set_test_pattern( } } +static bool dce120_arm_vert_intr( + struct timing_generator *tg, + uint8_t width) +{ + struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); + uint32_t vbl, position, vbl_start; + + tg->funcs->get_scanoutpos( + tg, + &vbl, + &position); + + if (vbl == 0) + return false; + + vbl_start = + get_reg_field_value( + vbl, + CRTC0_CRTC_V_BLANK_START_END, + CRTC_V_BLANK_START); + + CRTC_REG_SET_2( + CRTC0_CRTC_VERTICAL_INTERRUPT0_POSITION, + CRTC_VERTICAL_INTERRUPT0_LINE_START, vbl_start, + CRTC_VERTICAL_INTERRUPT0_LINE_END, vbl_start + width); + + return true; +} + static struct timing_generator_funcs dce120_tg_funcs = { .validate_timing = dce120_tg_validate_timing, .program_timing = dce120_tg_program_timing, @@ -1068,7 +1097,8 @@ static struct timing_generator_funcs dce120_tg_funcs = { .enable_advanced_request = dce120_timing_generator_enable_advanced_request, .set_drr = dce120_timing_generator_set_drr, .set_static_screen_control = dce120_timing_generator_set_static_screen_control, - .set_test_pattern = dce120_timing_generator_set_test_pattern + .set_test_pattern = dce120_timing_generator_set_test_pattern, + .arm_vert_intr = dce120_arm_vert_intr, }; |