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| author | Martin Leung <martin.leung@amd.com> | 2020-01-30 18:54:44 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-02-11 11:50:42 -0500 |
| commit | a760fc1bff03f24485324b9ee0c95a45a8cbc5c8 (patch) | |
| tree | 4e16d4d643964228edec8feb9ba6eac3ed2de1a8 /drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c | |
| parent | 5bf24270d1ccd94f0b6efcd7c96b98bf1faea893 (diff) | |
| download | linux-stable-a760fc1bff03f24485324b9ee0c95a45a8cbc5c8.tar.gz linux-stable-a760fc1bff03f24485324b9ee0c95a45a8cbc5c8.tar.bz2 linux-stable-a760fc1bff03f24485324b9ee0c95a45a8cbc5c8.zip | |
drm/amd/display: add monitor patch to disable SCDC read/write
[why]
customer issue: found that for their specific panel, EDID register space
being overwritten during SCDC read write
[how]
customer accepted HDMI 2 features not working - disabled SCDC read/write
as well as HDMI 2 in general based on monitor patch
Signed-off-by: Martin Leung <martin.leung@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c index 1a37c90e9d43..d3617d6785a7 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c @@ -782,6 +782,11 @@ bool dcn10_link_encoder_validate_output_with_stream( struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); bool is_valid; + //if SCDC (340-600MHz) is disabled, set to HDMI 1.4 timing limit + if (stream->sink->edid_caps.panel_patch.skip_scdc_overwrite && + enc10->base.features.max_hdmi_pixel_clock > 300000) + enc10->base.features.max_hdmi_pixel_clock = 300000; + switch (stream->signal) { case SIGNAL_TYPE_DVI_SINGLE_LINK: case SIGNAL_TYPE_DVI_DUAL_LINK: |