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| author | Charlene Liu <charlene.liu@amd.com> | 2023-08-25 15:04:46 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-09-11 17:17:57 -0400 |
| commit | a6db1993c18bc2138a85227bb28b69c82cbe722b (patch) | |
| tree | 04f0c1bea482d70ec01319e9ecee97bb80f72060 /drivers/gpu/drm/amd/display/dc/dcn10 | |
| parent | c06ef68a794619576a378d4e19cc6ef94fa03b62 (diff) | |
| download | linux-stable-a6db1993c18bc2138a85227bb28b69c82cbe722b.tar.gz linux-stable-a6db1993c18bc2138a85227bb28b69c82cbe722b.tar.bz2 linux-stable-a6db1993c18bc2138a85227bb28b69c82cbe722b.zip | |
drm/amd/display: fix some non-initialized register mask and setting
[why]
fix some non-initialized register mask and update golden setting
Reviewed-by: Duncan Ma <duncan.ma@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h index 085b269c654f..c429590f1298 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h @@ -577,7 +577,10 @@ struct dcn10_stream_enc_registers { type DIG_FIFO_READ_START_LEVEL;\ type DIG_FIFO_ENABLE;\ type DIG_FIFO_RESET;\ - type DIG_FIFO_RESET_DONE + type DIG_FIFO_RESET_DONE;\ + type PIXEL_ENCODING_TYPE;\ + type UNCOMPRESSED_PIXEL_FORMAT;\ + type UNCOMPRESSED_COMPONENT_DEPTH #define SE_REG_FIELD_LIST_DCN3_5_COMMON(type) \ type DIG_FE_CLK_EN;\ |