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| author | Alvin Lee <alvin.lee2@amd.com> | 2020-07-29 23:08:59 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-08-10 17:26:52 -0400 |
| commit | 81b437f57e35a6caa3a4304e6fff0eba0a9f3266 (patch) | |
| tree | 083215b488e703bb422147213714bca8f7a87a65 /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c | |
| parent | 073e7cd56d04110792a7a16b344d8b462178cadb (diff) | |
| download | linux-stable-81b437f57e35a6caa3a4304e6fff0eba0a9f3266.tar.gz linux-stable-81b437f57e35a6caa3a4304e6fff0eba0a9f3266.tar.bz2 linux-stable-81b437f57e35a6caa3a4304e6fff0eba0a9f3266.zip | |
drm/amd/display: Disconnect pipe separetely when disable pipe split
[Why]
When changing pixel formats for HDR (e.g. ARGB -> FP16)
there are configurations that change from 2 pipes to 1 pipe.
In these cases, it seems that disconnecting MPCC and doing
a surface update at the same time(after unlocking) causes
some registers to be updated slightly faster than others
after unlocking (e.g. if the pixel format is updated to FP16
before the new surface address is programmed, we get
corruption on the screen because the pixel formats aren't
matching). We separate disconnecting MPCC from the rest
of the pipe programming sequence to prevent this.
[How]
Move MPCC disconnect into separate operation than the
rest of the pipe programming.
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c index 3dde6f26de47..966e1790b9bf 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c @@ -34,6 +34,8 @@ static const struct hw_sequencer_funcs dcn20_funcs = { .apply_ctx_to_hw = dce110_apply_ctx_to_hw, .apply_ctx_for_surface = NULL, .program_front_end_for_ctx = dcn20_program_front_end_for_ctx, + .disconnect_pipes = dcn10_disconnect_pipes, + .wait_for_pending_cleared = dcn10_wait_for_pending_cleared, .post_unlock_program_front_end = dcn20_post_unlock_program_front_end, .update_plane_addr = dcn20_update_plane_addr, .update_dchub = dcn10_update_dchub, |