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authorJosip Pavic <Josip.Pavic@amd.com>2019-04-04 13:44:27 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-06-22 09:34:10 -0500
commitd7c29549e35cecc7cd866dc566e595b0cdee2590 (patch)
treeeb6722a31b09bd0380b122913f4c6e759aa1ebe5 /drivers/gpu/drm/amd/display/dc/dcn20
parentc2209d15444581e2314e7f66edf24e1d9e6dba4a (diff)
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drm/amd/display: enable abm on dcn2
[Why] ABM is currently not enabled on DCN2. [How] Update the register name list for DCN2 and un-comment the code that creates the abm object. Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 2d6f9c4de893..0a11d1098a7e 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -271,19 +271,19 @@ static const struct dce_dmcu_shift dmcu_shift = {
static const struct dce_dmcu_mask dmcu_mask = {
DMCU_MASK_SH_LIST_DCN10(_MASK)
};
-/*
+
static const struct dce_abm_registers abm_regs = {
- ABM_DCN10_REG_LIST(0)
+ ABM_DCN20_REG_LIST()
};
static const struct dce_abm_shift abm_shift = {
- ABM_MASK_SH_LIST_DCN10(__SHIFT)
+ ABM_MASK_SH_LIST_DCN20(__SHIFT)
};
static const struct dce_abm_mask abm_mask = {
- ABM_MASK_SH_LIST_DCN10(_MASK)
+ ABM_MASK_SH_LIST_DCN20(_MASK)
};
-*/
+
#define audio_regs(id)\
[id] = {\
AUD_COMMON_REG_LIST(id)\
@@ -2811,7 +2811,7 @@ static bool construct(
goto create_fail;
}
- /*pool->base.abm = dce_abm_create(ctx,
+ pool->base.abm = dce_abm_create(ctx,
&abm_regs,
&abm_shift,
&abm_mask);
@@ -2819,7 +2819,7 @@ static bool construct(
dm_error("DC: failed to create abm!\n");
BREAK_TO_DEBUGGER();
goto create_fail;
- }*/
+ }
pool->base.pp_smu = dcn20_pp_smu_create(ctx);