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| author | Saaem Rizvi <syedsaaem.rizvi@amd.com> | 2023-05-18 12:12:20 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-06-09 12:41:26 -0400 |
| commit | 490ddccb84fe2f6165b2bdd2d00fd4ab593b95ec (patch) | |
| tree | ebc3d5a86872447ae3fd50cb74e382620f4dcf39 /drivers/gpu/drm/amd/display/dc/dcn314 | |
| parent | 0baae624630788862bbd654741929007971e9d5b (diff) | |
| download | linux-stable-490ddccb84fe2f6165b2bdd2d00fd4ab593b95ec.tar.gz linux-stable-490ddccb84fe2f6165b2bdd2d00fd4ab593b95ec.tar.bz2 linux-stable-490ddccb84fe2f6165b2bdd2d00fd4ab593b95ec.zip | |
drm/amd/display: Wrong index type for pipe iterator
[Why and How]
Type mismatch in index and pipe count might cause an infinite loop. code
Change should resolve this issue.
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Saaem Rizvi <syedsaaem.rizvi@amd.com>
Reviewed-by: Josip Pavic <Josip.Pavic@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn314')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c index 46b6f4f9e1fd..ce7e6f20b31f 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c @@ -392,7 +392,7 @@ void dcn314_set_pixels_per_cycle(struct pipe_ctx *pipe_ctx) void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context) { - uint8_t i; + unsigned int i; struct pipe_ctx *pipe = NULL; bool otg_disabled[MAX_PIPES] = {false}; |