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| author | Jimmy Kizito <Jimmy.Kizito@amd.com> | 2022-05-17 13:31:03 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-06-07 16:09:57 -0400 |
| commit | 6b6d12b6ff204cc224cd2369bda2b0580a80a5b3 (patch) | |
| tree | 57989a205274b1c5f46860e5abb61d79970d1c65 /drivers/gpu/drm/amd/display/dc/dcn31 | |
| parent | d4965c53b95d7533dfc2309d2fc25838bd33220e (diff) | |
| download | linux-stable-6b6d12b6ff204cc224cd2369bda2b0580a80a5b3.tar.gz linux-stable-6b6d12b6ff204cc224cd2369bda2b0580a80a5b3.tar.bz2 linux-stable-6b6d12b6ff204cc224cd2369bda2b0580a80a5b3.zip | |
drm/amd/display: Fix entry into transient encoder assignment mode.
[Why]
In some scenarios it is possible for the encoder assignment module to be
set to "transient" mode even though there are no new encoder
assignments.
This can lead to incorrect results when querying encoder assignment,
which in turn can cause incorrect displays to be manipulated.
[How]
Only allow encoder assignment to be in transient mode of operation when
there are valid new encoder assignments.
Reviewed-by: Meenakshikumar Somasundaram <Meenakshikumar.Somasundaram@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn31')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c | 2 |
2 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c index 8b12b4111c88..a788d160953b 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c @@ -458,6 +458,7 @@ void dcn31_link_encoder_enable_dp_output( /* Enable transmitter and encoder. */ if (!link_enc_cfg_is_transmitter_mappable(enc->ctx->dc, enc)) { + DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine); dcn20_link_encoder_enable_dp_output(enc, link_settings, clock_source); } else { @@ -489,6 +490,7 @@ void dcn31_link_encoder_enable_dp_output( return; } + DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id); link_dpia_control(enc->ctx, &dpia_control); } } @@ -503,6 +505,7 @@ void dcn31_link_encoder_enable_dp_mst_output( /* Enable transmitter and encoder. */ if (!link_enc_cfg_is_transmitter_mappable(enc->ctx->dc, enc)) { + DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine); dcn10_link_encoder_enable_dp_mst_output(enc, link_settings, clock_source); } else { @@ -534,6 +537,7 @@ void dcn31_link_encoder_enable_dp_mst_output( return; } + DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id); link_dpia_control(enc->ctx, &dpia_control); } } @@ -547,6 +551,7 @@ void dcn31_link_encoder_disable_output( /* Disable transmitter and encoder. */ if (!link_enc_cfg_is_transmitter_mappable(enc->ctx->dc, enc)) { + DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine); dcn10_link_encoder_disable_output(enc, signal); } else { @@ -578,6 +583,7 @@ void dcn31_link_encoder_disable_output( return; } + DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id); link_dpia_control(enc->ctx, &dpia_control); link_encoder_disable(enc10); diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c index 55f2e30b8e5a..1ed1404e969d 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c @@ -613,7 +613,7 @@ void dcn31_reset_hw_ctx_wrap( } /* New dc_state in the process of being applied to hardware. */ - dc->current_state->res_ctx.link_enc_cfg_ctx.mode = LINK_ENC_CFG_TRANSIENT; + link_enc_cfg_set_transient_mode(dc, dc->current_state, context); } void dcn31_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable) |