diff options
author | Melissa Wen <mwen@igalia.com> | 2022-07-16 18:51:44 -0100 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2022-07-25 09:31:02 -0400 |
commit | fbcc38811fcb47335899a3776b4fd5670db4e228 (patch) | |
tree | ed376ae263b20b20de04ef1ebabb949b3790f46e /drivers/gpu/drm/amd/display/dc/dcn31 | |
parent | 869618c3440227f848ff9ac55aa64d523a60476e (diff) | |
download | linux-stable-fbcc38811fcb47335899a3776b4fd5670db4e228.tar.gz linux-stable-fbcc38811fcb47335899a3776b4fd5670db4e228.tar.bz2 linux-stable-fbcc38811fcb47335899a3776b4fd5670db4e228.zip |
drm/amd/display: move dcn31_update_soc_for_wm_a func to dml fpu folder
Although dcn31_update_soc_for_wm_a() is only called in dml/dcn31/dcn31_fpu by
dc->res_pool->funcs->update_soc_for_wm_a(dc, context), it's declared in
dcn31_resource that is not FPU protected. Move this function to dcn31_fpu
file as part of the work to isolate FPU code.
Signed-off-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn31')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.h | 1 |
2 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c index 5e924d0389cc..178d40c0d70a 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c @@ -1716,15 +1716,6 @@ int dcn31_populate_dml_pipes_from_context( return pipe_cnt; } -void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context) -{ - if (dc->clk_mgr->bw_params->wm_table.entries[WM_A].valid) { - context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].pstate_latency_us; - context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_enter_plus_exit_time_us; - context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_exit_time_us; - } -} - void dcn31_calculate_wm_and_dlg( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.h b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.h index 393458015d6a..41f8ec99da6b 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.h +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.h @@ -59,7 +59,6 @@ dcn31_set_mcif_arb_params(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt); -void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context); struct resource_pool *dcn31_create_resource_pool( const struct dc_init_data *init_data, |