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| author | Yihan Zhu <yihan.zhu@amd.com> | 2023-10-30 13:29:51 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-11-17 09:30:49 -0500 |
| commit | fcfc6ceec3ebb725a0d6381a1120e7cd546e1df4 (patch) | |
| tree | d4ffe77978344a0455bb9030856f7006537ed7bd /drivers/gpu/drm/amd/display/dc/dcn35 | |
| parent | ef71bb4119c786f6f1d132b8863698874321798b (diff) | |
| download | linux-stable-fcfc6ceec3ebb725a0d6381a1120e7cd546e1df4.tar.gz linux-stable-fcfc6ceec3ebb725a0d6381a1120e7cd546e1df4.tar.bz2 linux-stable-fcfc6ceec3ebb725a0d6381a1120e7cd546e1df4.zip | |
drm/amd/display: Enable CM low mem power optimization
[WHY & HOW]
MPC MCM low mem power optimization still causes color distortion on
first SCE enablement, only forces light sleep for it.
DPP low memory power optimization still needs this bit to save power.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Yihan Zhu <yihan.zhu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn35')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c index c7e011d26d41..7a3faf2b1f06 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c @@ -724,7 +724,7 @@ static const struct dc_debug_options debug_defaults_drv = { .i2c = true, .dmcu = false, // This is previously known to cause hang on S3 cycles if enabled .dscl = true, - .cm = false, + .cm = true, .mpc = true, .optc = true, .vpg = true, |