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| author | Martin Leung <martin.leung@amd.com> | 2020-10-07 12:17:22 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-10-26 13:33:38 -0400 |
| commit | c36f0ab0aac7e0cf924d75e40770db35d330f6d0 (patch) | |
| tree | 85d7d198190110392b76b8b4a56bf1ed596ebb29 /drivers/gpu/drm/amd/display/dc/gpio | |
| parent | def48da790ce0b6f93638d9c3225913a61bd613f (diff) | |
| download | linux-stable-c36f0ab0aac7e0cf924d75e40770db35d330f6d0.tar.gz linux-stable-c36f0ab0aac7e0cf924d75e40770db35d330f6d0.tar.bz2 linux-stable-c36f0ab0aac7e0cf924d75e40770db35d330f6d0.zip | |
drm/amd/display: adding ddc_gpio_vga_reg_list to ddc reg def'ns
why:
oem-related ddc read/write fails without these regs
how:
copy from hw_factory_dcn20.c
Signed-off-by: Martin Leung <martin.leung@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/gpio')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c b/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c index 3be2c90b0c61..21583699f992 100644 --- a/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c +++ b/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c @@ -117,6 +117,12 @@ static const struct ddc_registers ddc_data_regs_dcn[] = { ddc_data_regs_dcn2(4), ddc_data_regs_dcn2(5), ddc_data_regs_dcn2(6), + { + DDC_GPIO_VGA_REG_LIST(DATA), + .ddc_setup = 0, + .phy_aux_cntl = 0, + .dc_gpio_aux_ctrl_5 = 0 + } }; static const struct ddc_registers ddc_clk_regs_dcn[] = { @@ -126,6 +132,12 @@ static const struct ddc_registers ddc_clk_regs_dcn[] = { ddc_clk_regs_dcn2(4), ddc_clk_regs_dcn2(5), ddc_clk_regs_dcn2(6), + { + DDC_GPIO_VGA_REG_LIST(CLK), + .ddc_setup = 0, + .phy_aux_cntl = 0, + .dc_gpio_aux_ctrl_5 = 0 + } }; static const struct ddc_sh_mask ddc_shift[] = { |