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authorEric Yang <Eric.Yang2@amd.com>2019-11-05 11:59:38 -0500
committerAlex Deucher <alexander.deucher@amd.com>2019-12-05 16:26:30 -0500
commitd3511fd01cef7da850a93cd51e965ad6450dd95e (patch)
tree48cdf942b41f6bc20f42db123222cadeaf2090f3 /drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h
parent76434f75d4a48525d825ec8ee0c018db4cc81f77 (diff)
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drm/amd/display: update sr and pstate latencies for Renoir
[Why] DF team has produced more optimized latency numbers. [How] Add sr latencies to the wm table, use different latencies for different wm sets. Also fix bb override from registery key for these latencies. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h
index f55203e427de..4aa09fe954c5 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h
@@ -66,6 +66,8 @@ struct wm_range_table_entry {
unsigned int wm_inst;
unsigned int wm_type;
double pstate_latency_us;
+ double sr_exit_time_us;
+ double sr_enter_plus_exit_time_us;
bool valid;
};