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authorJun Lei <Jun.Lei@amd.com>2022-02-20 13:58:51 -0500
committerAlex Deucher <alexander.deucher@amd.com>2022-06-03 16:45:01 -0400
commit49f594995a9255ff734f79c1fc22bd06119ebe8f (patch)
tree46c7513a070155f507999902ad5bec6d8e5f23ab /drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
parent452e9214431f1f6385bb20fdf6e1b5692947071f (diff)
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drm/amd/display: add new pixel rate programming
[why] New dividers in DCCG need to be programmed depending on encoder/stream type since pixels per clock in OTG/DIO is different DIO also needs additional programming depending on pixels per clock Signed-off-by: Jun Lei <Jun.Lei@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
index 36ec56524afd..e5fe0f6adc86 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
@@ -247,6 +247,9 @@ struct stream_encoder_funcs {
uint32_t (*get_fifo_cal_average_level)(
struct stream_encoder *enc);
+
+ void (*set_input_mode)(
+ struct stream_encoder *enc, unsigned int pix_per_container);
};
struct hpo_dp_stream_encoder_state {