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authorCharlene Liu <charlene.liu@amd.com>2019-03-01 11:12:50 -0500
committerAlex Deucher <alexander.deucher@amd.com>2019-03-20 23:39:48 -0500
commit7fe538a4d64135d8f8e4aca8d0aedf266958025c (patch)
tree4acc1d7a90038a20cf4b823e7e5d5b5fe2b8927d /drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
parentae5041f3a03134a4cd5fc1c41e082c0e5d290392 (diff)
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drm/amd/display: fix DP 422 VID_M half the rate issue.
[Description] when programming VID_TIMING, we were using the original VESA timing for DP_VIDM/N. for YCbCr420 or compressed YCbCr422, using half rate as YCbCr444. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
index 8ba73a474014..8aafed8793df 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
@@ -67,8 +67,7 @@ struct encoder_info_frame {
struct encoder_unblank_param {
struct dc_link_settings link_settings;
- unsigned int pixel_clk_khz;
- enum dc_pixel_encoding pixel_encoding;
+ struct dc_crtc_timing timing;
};
struct encoder_set_dp_phy_pattern_param {