summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/display/dc/inc/hw
diff options
context:
space:
mode:
authorAMD\ktsao <kenny.tsao@amd.com>2017-07-30 14:18:36 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 18:16:02 -0400
commit43193c7991de7a2112fe2ddcfd930733bc357862 (patch)
tree89fff4e59c12925e33a044f0b8905945f457098d /drivers/gpu/drm/amd/display/dc/inc/hw
parent7a09f5be98df25a7253e4647e801120b37b90feb (diff)
downloadlinux-stable-43193c7991de7a2112fe2ddcfd930733bc357862.tar.gz
linux-stable-43193c7991de7a2112fe2ddcfd930733bc357862.tar.bz2
linux-stable-43193c7991de7a2112fe2ddcfd930733bc357862.zip
drm/amd/display: remove DCN1 guard as DCN1 is already open sourced.
Signed-off-by: Kenny Tsao <kenny.tsao@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/display_clock.h2
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h2
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h4
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/opp.h2
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h7
5 files changed, 1 insertions, 16 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/display_clock.h b/drivers/gpu/drm/amd/display/dc/inc/hw/display_clock.h
index 240ab11d1d30..879c3db7cba6 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/display_clock.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/display_clock.h
@@ -37,13 +37,11 @@ struct clocks_value {
bool dispclk_notify_pplib_done;
bool pixelclk_notify_pplib_done;
bool phyclk_notigy_pplib_done;
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
int dcfclock_in_khz;
int dppclk_in_khz;
int mclk_in_khz;
int phyclk_in_khz;
int common_vdd_level;
-#endif
};
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h
index 1298d306db69..0f952e5b3ae8 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h
@@ -122,9 +122,7 @@ struct ipp_funcs {
struct input_pixel_processor *ipp,
const struct pwl_params *params);
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
void (*ipp_destroy)(struct input_pixel_processor **ipp);
-#endif
};
#endif /* __DAL_IPP_H__ */
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h b/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
index a7c89c36f90f..a02f18ae527d 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
@@ -28,7 +28,6 @@
#include "dc.h"
#include "include/grph_object_id.h"
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
#include "dml/display_mode_structs.h"
struct cstate_pstate_watermarks_st {
@@ -49,7 +48,6 @@ struct dcn_watermark_set {
struct dcn_watermarks c;
struct dcn_watermarks d;
};
-#endif
struct dce_watermarks {
int a_mark;
@@ -76,7 +74,6 @@ struct mem_input {
};
struct mem_input_funcs {
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
void (*mem_input_setup)(
struct mem_input *mem_input,
struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
@@ -90,7 +87,6 @@ struct mem_input_funcs {
struct mem_input *mem_input,
const struct rect *viewport,
const struct rect *viewport_c);
-#endif
void (*mem_input_program_display_marks)(
struct mem_input *mem_input,
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
index dadd2ad2e5b8..75adb8fec551 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
@@ -27,9 +27,7 @@
#define __DAL_OPP_H__
#include "hw_shared.h"
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
#include "dc_hw_types.h"
-#endif
#include "transform.h"
struct fixed31_32;
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
index 2b72d1d8012f..c6ab38c5b2be 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
@@ -91,7 +91,7 @@ enum crtc_state {
CRTC_STATE_VBLANK = 0,
CRTC_STATE_VACTIVE
};
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
+
struct _dlg_otg_param {
int vstartup_start;
int vupdate_offset;
@@ -99,7 +99,6 @@ struct _dlg_otg_param {
int vready_offset;
enum signal_type signal;
};
-#endif
struct crtc_stereo_flags {
uint8_t PROGRAM_STEREO : 1;
@@ -113,9 +112,7 @@ struct timing_generator {
const struct timing_generator_funcs *funcs;
struct dc_bios *bp;
struct dc_context *ctx;
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
struct _dlg_otg_param dlg_otg_param;
-#endif
int inst;
};
@@ -176,10 +173,8 @@ struct timing_generator_funcs {
bool (*arm_vert_intr)(struct timing_generator *tg, uint8_t width);
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
void (*program_global_sync)(struct timing_generator *tg);
void (*enable_optc_clock)(struct timing_generator *tg, bool enable);
-#endif
void (*program_stereo)(struct timing_generator *tg,
const struct dc_crtc_timing *timing, struct crtc_stereo_flags *flags);
bool (*is_stereo_left_eye)(struct timing_generator *tg);