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author | Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> | 2018-09-28 07:46:42 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2018-11-05 14:20:48 -0500 |
commit | 84e7fc05a92700297f1de945251fa3b14349532c (patch) | |
tree | b3e334059e49d437345f52834775baaf9421b9d9 /drivers/gpu/drm/amd/display/dc/inc/hw | |
parent | 98e90a34ccdcc7550c9b9bdce2f342cd4df95f1f (diff) | |
download | linux-stable-84e7fc05a92700297f1de945251fa3b14349532c.tar.gz linux-stable-84e7fc05a92700297f1de945251fa3b14349532c.tar.bz2 linux-stable-84e7fc05a92700297f1de945251fa3b14349532c.zip |
drm/amd/display: rename dccg to clk_mgr
In preparation for adding the actual dccg block since the
current implementation of dccg is mor eof a clock manager
than a hw block
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h (renamed from drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h) | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h index 6fd923d876dc..23a4b18e5fee 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h @@ -23,25 +23,25 @@ * */ -#ifndef __DAL_DCCG_H__ -#define __DAL_DCCG_H__ +#ifndef __DAL_CLK_MGR_H__ +#define __DAL_CLK_MGR_H__ #include "dm_services_types.h" #include "dc.h" -struct dccg { +struct clk_mgr { struct dc_context *ctx; - const struct dccg_funcs *funcs; + const struct clk_mgr_funcs *funcs; struct dc_clocks clks; }; -struct dccg_funcs { - void (*update_clocks)(struct dccg *dccg, +struct clk_mgr_funcs { + void (*update_clocks)(struct clk_mgr *clk_mgr, struct dc_state *context, bool safe_to_lower); - int (*get_dp_ref_clk_frequency)(struct dccg *dccg); + int (*get_dp_ref_clk_frequency)(struct clk_mgr *clk_mgr); }; -#endif /* __DAL_DCCG_H__ */ +#endif /* __DAL_CLK_MGR_H__ */ |