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author | Wenjing Liu <wenjing.liu@amd.com> | 2023-07-22 15:45:00 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2023-08-07 17:14:08 -0400 |
commit | 460ea8980511c01c1551012b9a6ec6a06d02da59 (patch) | |
tree | b010c8086c23a97b6b7f34d2890ac978b84c47b2 /drivers/gpu/drm/amd/display/dc/inc | |
parent | ca030d83f53bbe8cadfaf928d170078213749624 (diff) | |
download | linux-stable-460ea8980511c01c1551012b9a6ec6a06d02da59.tar.gz linux-stable-460ea8980511c01c1551012b9a6ec6a06d02da59.tar.bz2 linux-stable-460ea8980511c01c1551012b9a6ec6a06d02da59.zip |
drm/amd/display: update add plane to context logic with a new algorithm
[why]
Preivous algorithm for finding an optimal idle pipe for a new plane was
implemented to handle dynamic pipe allocation when MPO plane moves
from one ODM slice to the other. Now pipe allocation is more static so
it no longer depends on the MPO plane's position. We are simplifying
our logic and remove unnecessary handling in our code.
[how]
Apply a new simplified version of pipe resource allocation logic to reduce
unnecessary flip delay caused by swapping secondary dpp pipe to other
MPC blending tree.
Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/core_types.h | 42 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/resource.h | 8 |
2 files changed, 21 insertions, 29 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h index bc0c26a5f228..5b9d0bb0328c 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h +++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h @@ -126,38 +126,24 @@ struct resource_funcs { struct dc_state *context); /* - * Acquires a free pipe for the head pipe. - * The head pipe is first pipe in the current context that matches the stream - * and does not have a top pipe or prev_odm_pipe. - */ - struct pipe_ctx *(*acquire_idle_pipe_for_layer)( - struct dc_state *context, - const struct resource_pool *pool, - struct dc_stream_state *stream); - - /* - * Acquires a free pipe for the head pipe with some additional checks for odm. - * The head pipe is passed in as an argument unlike acquire_idle_pipe_for_layer - * where it is read from the context. So this allows us look for different - * idle_pipe if the head_pipes are different ( ex. in odm 2:1 when we have - * a left and right pipe ). - * - * It also checks the old context to see if: + * Acquire an idle pipe from context, which could be used as a secondary + * pipe for the otg master pipe associated with the input stream. * - * 1. a pipe has already been allocated for the head pipe. If so, it will - * try to select that pipe as the idle pipe if it is available in the current - * context. - * 2. if the head_pipe is on the left, it will check if the right pipe has - * a pipe already allocated. If so, it will not use that pipe if it is - * selected as the idle pipe. + * an idle pipe - a pipe not yet used for any streams or + * planes. + * secondary pipe - a pipe gets inserted to a head OPP pipe's blending + * tree. This is typical used for rendering MPO planes or additional + * offset areas in MPCC combine. */ - struct pipe_ctx *(*acquire_idle_pipe_for_head_pipe_in_layer)( - struct dc_state *context, + struct pipe_ctx *(*acquire_idle_pipe_for_layer)( + const struct dc_state *cur_ctx, + struct dc_state *new_ctx, const struct resource_pool *pool, - struct dc_stream_state *stream, - struct pipe_ctx *head_pipe); + const struct pipe_ctx *opp_head_pipe); - enum dc_status (*validate_plane)(const struct dc_plane_state *plane_state, struct dc_caps *caps); + enum dc_status (*validate_plane)( + const struct dc_plane_state *plane_state, + struct dc_caps *caps); enum dc_status (*add_stream_to_ctx)( struct dc *dc, diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h index eaeb684c8a48..6ac6680711ff 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/resource.h +++ b/drivers/gpu/drm/amd/display/dc/inc/resource.h @@ -153,11 +153,17 @@ bool resource_attach_surfaces_to_context( struct dc_state *context, const struct resource_pool *pool); -struct pipe_ctx *find_idle_secondary_pipe( +struct pipe_ctx *find_idle_secondary_pipe_legacy( struct resource_context *res_ctx, const struct resource_pool *pool, const struct pipe_ctx *primary_pipe); +struct pipe_ctx *find_optimal_idle_pipe_as_secondary_dpp_pipe( + const struct resource_context *cur_res_ctx, + struct resource_context *new_res_ctx, + const struct resource_pool *pool, + const struct pipe_ctx *new_pri); + bool resource_validate_attach_surfaces( const struct dc_validation_set set[], int set_count, |