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author | Wenjing Liu <wenjing.liu@amd.com> | 2023-11-02 14:59:13 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2023-11-29 16:48:59 -0500 |
commit | cfab803884f426b36b58dbe1f86f99742767c208 (patch) | |
tree | a2b47b8547726268baa4cd5fa8bd9ad9747c9a2c /drivers/gpu/drm/amd/display/dc/inc | |
parent | 2e9b152325f649923b9324fa8ea5f1a5289145bb (diff) | |
download | linux-stable-cfab803884f426b36b58dbe1f86f99742767c208.tar.gz linux-stable-cfab803884f426b36b58dbe1f86f99742767c208.tar.bz2 linux-stable-cfab803884f426b36b58dbe1f86f99742767c208.zip |
drm/amd/display: update pixel clock params after stream slice count change in context
[why]
When ODM slice count is changed, otg master pipe's pixel clock params is
no longer valid as the value is dependent on ODM slice count.
Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/core_types.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h index bac1420b1de8..10397d4dfb07 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h +++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h @@ -205,6 +205,7 @@ struct resource_funcs { void (*get_panel_config_defaults)(struct dc_panel_config *panel_config); void (*save_mall_state)(struct dc *dc, struct dc_state *context, struct mall_temp_config *temp_config); void (*restore_mall_state)(struct dc *dc, struct dc_state *context, struct mall_temp_config *temp_config); + void (*build_pipe_pix_clk_params)(struct pipe_ctx *pipe_ctx); }; struct audio_support{ |